MSP430G2333-Q1 Datasheet, PDF (5/62 Pages) Texas Instruments – Automotive Mixed-Signal Microcontroller

www.ti.com
7 Terminal Configuration and Functions
7.1 20-Pin PW Package (Top View)
MSP430G2333-Q1
SLAS802A – OCTOBER 2013 – REVISED MARCH 2014
DVCC 1
P1.0/TA0CLK/ACLK/A0 2
P1.1/TA0.0/UCA0RXD/UCA0SOMI/A1 3
P1.2/TA0.1/UCA0TXD/UCA0SIMO/A2 4
P1.3/ADC10CLK/VREF-/VEREF-/A3 5
P1.4/SMCLK/UCB0STE/UCA0CLK/VREF+/VEREF+/A4/TCK 6
P1.5/TA0.0/UCB0CLK/UCA0STE/A5/TMS 7
P2.0/TA1.0 8
P2.1/TA1.1 9
P2.2/TA1.1 10
PW20
(TOP VIEW)
20 DVSS
19 XIN/P2.6/TA0.1
18 XOUT/P2.7
17 TEST/SBWTCK
16 RST/NMI/SBWTDIO
15 P1.7/UCB0SIMO/UCB0SDA/A7/TDO/TDI
14 P1.6/TA0.1/UCB0SOMI/UCB0SCL/A6/TDI/TCLK
13 P2.5/TA1.2
12 P2.4/TA1.2
11 P2.3/TA1.0
NOTE: The pulldown resistors of port P3 should be enabled by setting P3REN.x = 1.
7.2 28-Pin PW Package (Top View)
DVCC 1
P1.0/TA0CLK/ACLK/A0 2
P1.1/TA0.0/UCA0RXD/UCA0SOMI/A1 3
P1.2/TA0.1/UCA0TXD/UCA0SIMO/A2 4
P1.3/ADC10CLK/VREF-/VEREF-/A3 5
P1.4/SMCLK/UCB0STE/UCA0CLK/VREF+/VEREF+/A4/TCK 6
P1.5/TA0.0/UCB0CLK/UCA0STE/A5/TMS 7
P3.1/TA1.0 8
P3.0/TA0.2 9
P2.0/TA1.0 10
P2.1/TA1.1 11
P2.2/TA1.1 12
P3.2/TA1.1 13
P3.3/TA1.2 14
PW28
(TOP VIEW)
28 DVSS
27 XIN/P2.6/TA0.1
26 XOUT/P2.7
25 TEST/SBWTCK
24 RST/NMI/SBWTDIO
23 P1.7/UCB0SIMO/UCB0SDA/A7/TDO/TDI
22 P1.6/TA0.1/UCB0SOMI/UCB0SCL/A6/TDI/TCLK
21 P3.7/TA1CLK
20 P3.6/TA0.2
19 P3.5/TA0.1
18 P2.5/TA1.2
17 P2.4/TA1.2
16 P2.3/TA1.0
15 P3.4/TA0.0
Copyright © 2013–2014, Texas Instruments Incorporated
Product Folder Links: MSP430G2333-Q1
Submit Documentation Feedback
5