MSP430G2333-Q1 Datasheet, PDF (29/62 Pages) Texas Instruments – Automotive Mixed-Signal Microcontroller

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MSP430G2333-Q1
SLAS802A – OCTOBER 2013 – REVISED MARCH 2014
9.20 Crystal Oscillator, XT1, Low-Frequency Mode⁽¹⁾
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
f_LFXT1,LF
PARAMETER
LFXT1 oscillator crystal
frequency, LF mode 0, 1
TEST CONDITIONS
XTS = 0, LFXT1Sx = 0 or 1
V_CC
1.8 V to 3.6 V
MIN TYP MAX UNIT
32768
Hz
f_{LFXT1,LF,logic}
LFXT1 oscillator logic level
square wave input frequency, XTS = 0, XCAPx = 0, LFXT1Sx = 3
LF mode
1.8 V to 3.6 V 10000 32768 50000 Hz
OA_LF
Oscillation allowance for
LF crystals
XTS = 0, LFXT1Sx = 0,
f_LFXT1,LF = 32768 Hz, C_L,eff = 6 pF
XTS = 0, LFXT1Sx = 0,
f_LFXT1,LF = 32768 Hz, C_L,eff = 12 pF
XTS = 0, XCAPx = 0
500
kΩ
200
1
C_L,eff
Integrated effective load
capacitance, LF mode⁽²⁾
XTS = 0, XCAPx = 1
XTS = 0, XCAPx = 2
5.5
pF
8.5
XTS = 0, XCAPx = 3
11
Duty cycle
f_Fault,LF
LF mode
Oscillator fault frequency,
LF mode⁽³⁾
XTS = 0, Measured at P2.0/ACLK,
f_LFXT1,LF = 32768 Hz
XTS = 0, XCAPx = 0, LFXT1Sx = 3⁽⁴⁾
2.2 V
2.2 V
30
50
70 %
10
10000 Hz
(1) To improve EMI on the XT1 oscillator, the following guidelines should be observed.
(a) Keep the trace between the device and the crystal as short as possible.
(b) Design a good ground plane around the oscillator pins.
(c) Prevent crosstalk from other clock or data lines into oscillator pins XIN and XOUT.
(d) Avoid running PCB traces underneath or adjacent to the XIN and XOUT pins.
(e) Use assembly materials and techniques that avoid any parasitic load on the oscillator XIN and XOUT pins.
(f) If conformal coating is used, ensure that it does not induce capacitive or resistive leakage between the oscillator pins.
(g) Do not route the XOUT line to the JTAG header to support the serial programming adapter as shown in other documentation. This
signal is no longer required for the serial programming adapter.
(2) Includes parasitic bond and package capacitance (approximately 2 pF per pin).
Because the PCB adds additional capacitance, it is recommended to verify the correct load by measuring the ACLK frequency. For a
correct setup, the effective load capacitance should always match the specification of the used crystal.
(3) Frequencies below the MIN specification set the fault flag. Frequencies above the MAX specification do not set the fault flag.
Frequencies in between might set the flag.
(4) Measured with logic-level input frequency but also applies to operation with crystals.
9.21 Internal Very-Low-Power Low-Frequency Oscillator (VLO)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
f_VLO
VLO frequency
df_VLO/d_T VLO frequency temperature drift
df_VLO/dV_CC VLO frequency supply voltage drift
T_A
-40°C to 85°C
-40°C to 85°C
25°C
V_CC
3V
3V
1.8 V to 3.6 V
MIN TYP
4
12
0.5
4
MAX
20
UNIT
kHz
%/°C
%/V
9.22 Timer_A
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
f_TA
t_TA,cap
PARAMETER
Timer_A input clock frequency
Timer_A capture timing
TEST CONDITIONS
SMCLK, duty cycle = 50% ± 10%
TA0, TA1
V_CC
MIN
TYP
f_SYSTEM
3V
20
MAX
UNIT
MHz
ns
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