MSP430G2333-Q1 Datasheet, PDF (17/62 Pages) Texas Instruments – Automotive Mixed-Signal Microcontroller

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MSP430G2333-Q1
SLAS802A – OCTOBER 2013 – REVISED MARCH 2014
USCI_A0
MODULE
ADC10
Basic Clock System+
Port P3
(28-pin PW only)
Port P2
Port P1
Special Function
Table 15. Peripherals With Byte Access (continued)
REGISTER DESCRIPTION
USCI_A0 transmit buffer
USCI_A0 receive buffer
USCI_A0 status
USCI_A0 modulation control
USCI_A0 baud rate control 1
USCI_A0 baud rate control 0
USCI_A0 control 1
USCI_A0 control 0
USCI_A0 IrDA receive control
USCI_A0 IrDA transmit control
USCI_A0 auto baud rate control
ADC analog enable 0
ADC analog enable 1
ADC data transfer control register 1
ADC data transfer control register 0
Basic clock system control 3
Basic clock system control 2
Basic clock system control 1
DCO clock frequency control
Port P3 selection 2. pin
Port P3 resistor enable
Port P3 selection
Port P3 direction
Port P3 output
Port P3 input
Port P2 selection 2
Port P2 resistor enable
Port P2 selection
Port P2 interrupt enable
Port P2 interrupt edge select
Port P2 interrupt flag
Port P2 direction
Port P2 output
Port P2 input
Port P1 selection 2
Port P1 resistor enable
Port P1 selection
Port P1 interrupt enable
Port P1 interrupt edge select
Port P1 interrupt flag
Port P1 direction
Port P1 output
Port P1 input
SFR interrupt flag 2
SFR interrupt flag 1
SFR interrupt enable 2
SFR interrupt enable 1
REGISTER
NAME
UCA0TXBUF
UCA0RXBUF
UCA0STAT
UCA0MCTL
UCA0BR1
UCA0BR0
UCA0CTL1
UCA0CTL0
UCA0IRRCTL
UCA0IRTCTL
UCA0ABCTL
ADC10AE0
ADC10AE1
ADC10DTC1
ADC10DTC0
BCSCTL3
BCSCTL2
BCSCTL1
DCOCTL
P3SEL2
P3REN
P3SEL
P3DIR
P3OUT
P3IN
P2SEL2
P2REN
P2SEL
P2IE
P2IES
P2IFG
P2DIR
P2OUT
P2IN
P1SEL2
P1REN
P1SEL
P1IE
P1IES
P1IFG
P1DIR
P1OUT
P1IN
IFG2
IFG1
IE2
IE1
OFFSET
067h
066h
065h
064h
063h
062h
061h
060h
05Fh
05Eh
05Dh
04Ah
04Bh
049h
048h
053h
058h
057h
056h
043h
010h
01Bh
01Ah
019h
018h
042h
02Fh
02Eh
02Dh
02Ch
02Bh
02Ah
029h
028h
041h
027h
026h
025h
024h
023h
022h
021h
020h
003h
002h
001h
000h
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