DS92LV1224_15 Datasheet, PDF (5/23 Pages) Texas Instruments – 30-66 MHz 10 Bit Bus LVDS Deserializer

DS92LV1224
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SNLS189A – APRIL 2005 – REVISED APRIL 2013
Figure 1. RMT Patterns Seen on the Bus LVDS Serial Output
DIN0 Held Low-DIN1 Held High Creates an RMT Pattern
DIN4 Held Low-DIN5 Held High Creates an RMT Pattern
DIN8 Held Low-DIN9 Held High Creates an RMT Pattern
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