LM3S818 Datasheet, PDF (456/572 Pages) Bookham, Inc. – Microcontroller

Analog Comparator
Register 6: Analog Comparator Control 0 (ACCTL0), offset 0x024
This register configures the comparator’s input and output.
Analog Comparator Control 0 (ACCTL0)
Base 0x4003.C000
Offset 0x024
Type R/W, reset 0x0000.0000
31
30
29
28
27
26
25
24
23
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
15
Type RO
Reset
0
14
13
reserved
RO
RO
0
0
12
11
10
9
8
7
TOEN
ASRCP
reserved TSLVAL
RO
R/W
R/W
R/W
RO
R/W
0
0
0
0
0
0
22
21
RO
RO
0
0
6
5
TSEN
R/W
R/W
0
0
20
RO
0
4
ISLVAL
R/W
0
19
18
RO
RO
0
0
3
2
ISEN
R/W
R/W
0
0
17
16
RO
RO
0
0
1
CINV
R/W
0
0
reserved
RO
0
Bit/Field
31:12
11
10:9
Name
reserved
TOEN
ASRCP
Type
RO
R/W
R/W
Reset
0x00
0
0x00
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Trigger Output Enable
The TOEN bit enables the ADC event transmission to the ADC. If 0, the
event is suppressed and not sent to the ADC. If 1, the event is
transmitted to the ADC.
Analog Source Positive
The ASRCP field specifies the source of input voltage to the VIN+ terminal
of the comparator. The encodings for this field are as follows:
Value Function
0x0 Pin value
0x1 Pin value of C0+
0x2 Internal voltage reference
0x3 Reserved
8
reserved
RO
0
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
7
TSLVAL
R/W
0
Trigger Sense Level Value
The TSLVAL bit specifies the sense value of the input that generates
an ADC event if in Level Sense mode. If 0, an ADC event is generated
if the comparator output is Low. Otherwise, an ADC event is generated
if the comparator output is High.
456
July 14, 2014
Texas Instruments-Production Data