CC1350_16 Datasheet, PDF (41/61 Pages) Texas Instruments – SimpleLink Ultra-Low-Power Dual-Band Wireless MCU

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CC1350
SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016
6.7 Power Management
To minimize power consumption, the CC1350 device supports a number of power modes and power-
management features (see Table 6-2).
Table 6-2. Power Modes
MODE
SOFTWARE-CONFIGURABLE POWER MODES
ACTIVE
IDLE
STANDBY
CPU
Active
Off
Off
Flash
On
Available
Off
SRAM
On
On
On
Radio
Available
Available
Off
Supply System
On
On
Duty Cycled
Current
Wake-up Time to CPU Active⁽¹⁾
1.2 mA + 25.5 µA/MHz
–
570 µA
14 µs
0.6 µA
174 µs
Register Retention
Full
Full
Partial
SRAM Retention
Full
Full
Full
High-Speed Clock
XOSC_HF or
RCOSC_HF
XOSC_HF or
RCOSC_HF
Off
Low-Speed Clock
XOSC_LF or
RCOSC_LF
XOSC_LF or
RCOSC_LF
XOSC_LF or
RCOSC_LF
Peripherals
Available
Available
Off
Sensor Controller
Available
Available
Available
Wake-up on RTC
Available
Available
Available
Wake-up on Pin Edge
Available
Available
Available
Wake-up on Reset Pin
Available
Available
Available
Brown Out Detector (BOD)
Active
Active
Duty Cycled
Power On Reset (POR)
Active
Active
Active
(1) Not including RTOS overhead
SHUTDOWN
Off
Off
Off
Off
Off
185 nA
1015 µs
No
No
Off
Off
Off
Off
Off
Available
Available
Off
Active
RESET PIN
HELD
Off
Off
Off
Off
Off
0.1 µA
1015 µs
No
No
Off
Off
Off
Off
Off
Off
Available
N/A
N/A
In active mode, the application CM3 CPU is actively executing code. Active mode provides normal
operation of the processor and all of the peripherals that are currently enabled. The system clock can be
any available clock source (see Table 6-2).
In idle mode, all active peripherals can be clocked, but the Application CPU core and memory are not
clocked and no code is executed. Any interrupt event returns the processor to active mode.
In standby mode, only the always-on (AON) domain is active. An external wake-up event, RTC event, or
Sensor Controller event is required to return the device to active mode. MCU peripherals with retention do
not need to be reconfigured when waking up again, and the CPU continues execution from where it went
into standby mode. All GPIOs are latched in standby mode.
In shutdown mode, the device is entirely turned off (including the AON domain and Sensor Controller),
and the I/Os are latched with the value they had before entering shutdown mode. A change of state on
any I/O pin defined as a wake from shutdown pin wakes up the device and functions as a reset trigger.
The CPU can differentiate between reset in this way and reset-by-reset pin or POR by reading the reset
status register. The only state retained in this mode is the latched I/O state and the flash memory
contents.
The Sensor Controller is an autonomous processor that can control the peripherals in the Sensor
Controller independent of the main CPU. This means that the main CPU does not have to wake up, for
example to execute an ADC sample or poll a digital sensor over SPI, thus saving both current and wake-
up time that would otherwise be wasted. The Sensor Controller Studio lets the user configure the Sensor
Controller and choose which peripherals are controlled and which conditions wake up the main CPU.
Copyright © 2016, Texas Instruments Incorporated
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