CC1350_16 Datasheet, PDF (37/61 Pages) Texas Instruments – SimpleLink Ultra-Low-Power Dual-Band Wireless MCU

www.ti.com
CC1350
SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016
6 Detailed Description
6.1 Overview
Section 1.4 shows a block diagram of the core modules of the CC13xx product family.
6.2 Main CPU
The CC1350 SimpleLink Wireless MCU contains an ARM Cortex-M3 (CM3) 32-bit CPU, which runs the
application and the higher layers of the protocol stack.
The CM3 processor provides a high-performance, low-cost platform that meets the system requirements
of minimal memory implementation and low-power consumption, while delivering outstanding
computational performance and exceptional system response to interrupts.
The CM3 features include the following:
• 32-bit ARM Cortex-M3 architecture optimized for small-footprint embedded applications
• Outstanding processing performance combined with fast interrupt handling
• ARM Thumb^®-2 mixed 16- and 32-bit instruction set delivers the high performance expected of a 32-bit
ARM core in a compact memory size usually associated with 8- and 16-bit devices, typically in the
range of a few kilobytes of memory for microcontroller-class applications:
– Single-cycle multiply instruction and hardware divide
– Atomic bit manipulation (bit-banding), delivering maximum memory use and streamlined peripheral
control
– Unaligned data access, enabling data to be efficiently packed into memory
• Fast code execution permits slower processor clock or increases sleep mode time
• Harvard architecture characterized by separate buses for instruction and data
• Efficient processor core, system, and memories
• Hardware division and fast digital-signal-processing oriented multiply accumulate
• Saturating arithmetic for signal processing
• Deterministic, high-performance interrupt handling for time-critical applications
• Enhanced system debug with extensive breakpoint and trace capabilities
• Serial wire trace reduces the number of pins required for debugging and tracing
• Migration from the ARM7™ processor family for better performance and power efficiency
• Optimized for single-cycle flash memory use
• Ultra-low power consumption with integrated sleep modes
• 1.25 DMIPS per MHz
Copyright © 2016, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: CC1350
Detailed Description
37