DS90UA101-Q1_14 Datasheet, PDF (4/41 Pages) Texas Instruments – Multi-Channel Digital Audio Link

DS90UA101-Q1
SNLS441A – JULY 2013 – REVISED SEPTEMBER 2013
DS90UA101-Q1 Pin Diagram
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VDDIO
25
DIN5
26
DIN4
27
VDDD
28
DIN3
29
DIN2
30
DIN1
31
DIN0
32
DS90UA101-Q1
(Top View)
DAP = GND
16
GPO2
15
GPO3
14
VDDCML
13
DOUT+
12
DOUT-
11
VDDT
10
VDDPLL
9
PDB
Figure 3. DS90UA101-Q1 — Top View
Pin Descriptions
Pin Name
Pin #
I/O, Type
Description
Digital Audio Interface
SCK
3
Input, LVCMOS w/ System clock input.
pull down
Forward channel audio data is clocked from this pin.
LRCK
2
Input, LVCMOS w/ Word clock input.
pull down
BCK
DIN[7:0]
1
23, 24, 26, 27,
29, 30, 31, 32
Input, LVCMOS w/
pull down
Inputs, LVCMOS
w/ pull down
Bit clock input.
Digital audio data inputs. Each input can be in I²S, TDM, LJ, or RJ format.
LVCMOS Parallel Interface
GPI[3:0]
19, 20, 21, 22 Inputs, LVCMOS General purpose inputs.
w/ pull down
GPO[3:0] 15, 16, 17, 18 Outputs, LVCMOS General purpose outputs.
Control and Configuration
SCL
4
SDA
5
IDx
6
Input/Output, Open
Drain
Input/Output, Open
Drain
Input, Analog
I²C clock line.
Must have an external pull-up to V_DDIO. DO NOT FLOAT.
Recommended pull-up: 4.7 kΩ.
I²C data input/output line.
Must have an external pull-up to V_DDIO. DO NOT FLOAT.
Recommended pull-up: 4.7 kΩ.
Device I²C address select.
The IDx pin on the Serializer is used to assign its I²C device address. See Table 2. DO
NOT FLOAT.
SET
8
Input, Analog Device SET.
Connect to external 10 kΩ pull-up to 1.8V rail and 100kΩ pull-down to GND. DO NOT
FLOAT.
4
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