DS90UA101-Q1_14 Datasheet, PDF (14/41 Pages) Texas Instruments – Multi-Channel Digital Audio Link

DS90UA101-Q1
SNLS441A – JULY 2013 – REVISED SEPTEMBER 2013
SCK
80%
20%
80%
V_DD
20%
0V
t_CLKT
t_CLKT
Figure 9. Serializer Input Clock Transition Times
t_TCP
SCK
V_DDIO/2
V_DDIO/2
V_DDIO/2
t_DIS
t_DIH
DIN[7:0] _VDDIO/2 Setup
Hold
V_DDIO/2
V_DDIO
0V
Figure 10. Serializer Setup/Hold Times
PDB
VDDIO/2
SCK
DOUT±
t_PLD
TRI-STATE
Output Active
Figure 11. Serializer PLL Lock Time
TRI-STATE
DIN[7:0] SYMBOL N
SYMBOL N+1
SCK
VDDIO/2
SYMBOL N+2
t_SD
SYMBOL N+3
DOUT±
SYMBOL N-4
SYMBOL N-3
SYMBOL N-2
SYMBOL N-1
SYMBOL N
0V
Figure 12. Serializer Delay
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Ew
EH
EH
t_BIT (1 UI)
VOD (+)
0V
VOD (-)
Figure 13. CML Output Driver
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