MSP430FR5994 Datasheet, PDF (38/166 Pages) Texas Instruments – Mixed-Signal Microcontrollers

MSP430FR5994, MSP430FR59941, MSP430FR5992, MSP430FR5964, MSP430FR5962
SLASE54 – MARCH 2016
www.ti.com
The DCO (see Table 5-6) is an internal digitally controlled oscillator (DCO) with selectable frequencies.
Table 5-6. DCO
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
f_DCO1
PARAMETER
DCO frequency range 1 MHz,
trimmed
TEST CONDITIONS
Measured at SMCLK, divide by 1,
DCORSEL = 0, DCOFSEL = 0,
DCORSEL = 1, DCOFSEL = 0
V_CC
MIN TYP
MAX UNIT
1 ±3.5% MHz
f_DCO2.7
DCO frequency range 2.7 MHz, Measured at SMCLK, divide by 1,
trimmed
DCORSEL = 0, DCOFSEL = 1
2.667 ±3.5% MHz
f_DCO3.5
DCO frequency range 3.5 MHz, Measured at SMCLK, divide by 1,
trimmed
DCORSEL = 0, DCOFSEL = 2
3.5 ±3.5% MHz
f_DCO4
DCO frequency range 4 MHz,
trimmed
Measured at SMCLK, divide by 1,
DCORSEL = 0, DCOFSEL = 3
4 ±3.5% MHz
f_DCO5.3
DCO frequency range 5.3 MHz,
trimmed
Measured at SMCLK, divide by 1,
DCORSEL = 0, DCOFSEL = 4,
DCORSEL = 1, DCOFSEL = 1
5.333 ±3.5% MHz
f_DCO7
DCO frequency range 7 MHz,
trimmed
Measured at SMCLK, divide by 1,
DCORSEL = 0, DCOFSEL = 5,
DCORSEL = 1, DCOFSEL = 2
7 ±3.5% MHz
f_DCO8
DCO frequency range 8 MHz,
trimmed
Measured at SMCLK, divide by 1,
DCORSEL = 0, DCOFSEL = 6,
DCORSEL = 1, DCOFSEL = 3
8 ±3.5% MHz
f_DCO16
DCO frequency range 16 MHz,
trimmed
Measured at SMCLK, divide by 1,
DCORSEL = 1, DCOFSEL = 4
16 ±3.5%⁽¹⁾ MHz
f_DCO21
DCO frequency range 21 MHz,
trimmed
Measured at SMCLK, divide by 2,
DCORSEL = 1, DCOFSEL = 5
21 ±3.5%⁽¹⁾ MHz
f_DCO24
DCO frequency range 24 MHz,
trimmed
Measured at SMCLK, divide by 2,
DCORSEL = 1, DCOFSEL = 6
24 ±3.5%⁽¹⁾ MHz
f_DCO,DC
Duty cycle
Measured at SMCLK, divide by 1,
No external divide, all DCORSEL and
DCOFSEL settings except
DCORSEL = 1, DCOFSEL = 5 and
DCORSEL = 1, DCOFSEL = 6
48% 50%
52%
t_{DCO, JITTER} DCO jitter
df_DCO/dT
DCO temperature drift⁽²⁾
Based on f_signal = 10 kHz and DCO
used for 12-bit SAR ADC sampling
source. This achieves > 74 dB SNR
due to jitter (that is, limited by ADC
performance).
3.0 V
2
3 ns
0.01
%/ºC
(1) After a wake up from LPM1, LPM2, LPM3, or LPM4, the DCO frequency f_DCO might exceed the specified frequency range for a few
clock cycles by up to 5% before settling into the specified steady state frequency range.
(2) Calculated using the box method: (MAX(–40°C to 85ºC) – MIN(–40°C to 85ºC)) / MIN(–40°C to 85ºC) / (85ºC – (–40ºC))
38
Specifications
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