MSP430FR5994 Datasheet, PDF (23/166 Pages) Texas Instruments – Mixed-Signal Microcontrollers

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MSP430FR5994, MSP430FR59941, MSP430FR5992, MSP430FR5964, MSP430FR5962
SLASE54 – MARCH 2016
FUNCTION
SIGNAL
NAME
SPI
System
UCA0CLK
UCA0SIMO
UCA0SOMI
UCA0STE
UCA1CLK
UCA1SIMO
UCA1SOMI
UCA1STE
UCA2CLK
UCA2SIMO
UCA2SOMI
UCA2STE
UCA3CLK
UCA3SIMO
UCA3SOMI
UCA3STE
UCB0CLK
UCB0SIMO
UCB0SOMI
UCB0STE
UCB1CLK
UCB1SIMO
UCB1SOMI
UCB1STE
UCB2CLK
UCB2SIMO
UCB2SOMI
UCB2STE
UCB3CLK
UCB3SIMO
UCB3SOMI
UCB3STE
NMI
RST
Table 4-2. Signal Descriptions (continued)
ZVW
PIN NO.⁽¹⁾
PN PM
RGZ
PIN
TYPE ⁽²⁾
DESCRIPTION
B4
18
14
11
I/O
Clock signal input – eUSCI_A0 SPI slave mode
Clock signal output – eUSCI_A0 SPI master mode
L2
41
32
24
I/O Slave in/master out – eUSCI_A0 SPI mode
L3
42
33
25
I/O Slave out/master in – eUSCI_A0 SPI mode
B3
17
13
10
I/O Slave transmit enable – eUSCI_A0 SPI mode
K11 64
52
40
I/O
Clock signal input – eUSCI_A1 SPI slave mode
Clock signal output – eUSCI_A1 SPI master mode
G4
35
28
20
I/O Slave in/master out – eUSCI_A1 SPI mode
H1
36
29
21
I/O Slave out/master in – eUSCI_A1 SPI mode
J11 63
51
39
I/O Slave transmit enable – eUSCI_A1 SPI mode
G10 67
55
–
I/O
Clock signal input – eUSCI_A2 SPI slave mode
Clock signal output – eUSCI_A2 SPI master mode
J10 65
53
–
I/O Slave in/master out – eUSCI_A2 SPI mode
H10 66
54
–
I/O Slave out/master in – eUSCI_A2 SPI mode
G8
68
56
–
I/O Slave transmit enable – eUSCI_A2 SPI mode
A6
10
–
–
I/O
Clock signal input – eUSCI_A3 SPI slave mode
Clock signal output – eUSCI_A3 SPI master mode
D8
8
–
–
I/O Slave in/master out – eUSCI_A3 SPI mode
D7
9
–
–
I/O Slave out/master in – eUSCI_A3 SPI mode
B6
11
–
–
I/O Slave transmit enable – eUSCI_A3 SPI mode
K3
43
34
26
I/O
Clock signal input – eUSCI_B0 SPI slave mode
Clock signal output – eUSCI_B0 SPI master mode
L6
51
39
31
I/O Slave in/master out – eUSCI_B0 SPI mode
K6
52
40
32
I/O Slave out/master in – eUSCI_B0 SPI mode
A4
16
12
9
I/O Slave transmit enable – eUSCI_B0 SPI mode
K8
55
43
–
I/O
Clock signal input – eUSCI_B1 SPI slave mode
Clock signal output – eUSCI_B1 SPI master mode
L7
53
41
–
I/O Slave in/master out – eUSCI_B1 SPI mode
K7
54
42
–
I/O Slave out/master in – eUSCI_B1 SPI mode
L8
56
44
–
I/O Slave transmit enable – eUSCI_B1 SPI mode
D1
25
21
–
I/O
Clock signal input – eUSCI_B2 SPI slave mode
Clock signal output – eUSCI_B2 SPI master mode
A5
13
9
–
I/O Slave in/master out – eUSCI_B2 SPI mode
B5
14
10
–
I/O Slave out/master in – eUSCI_B2 SPI mode
D4
26
22
–
I/O Slave transmit enable – eUSCI_B2 SPI mode
E8
71
–
–
I/O
Clock signal input – eUSCI_B3 SPI slave mode
Clock signal output – eUSCI_B3 SPI master mode
F8
69
–
–
I/O Slave in/master out – eUSCI_B3 SPI mode
F10 70
–
–
I/O Slave out/master in – eUSCI_B3 SPI mode
C10 72
–
–
I/O Slave transmit enable – eUSCI_B3 SPI mode
J2
38
31
23
I
Nonmaskable interrupt input
J2
38
31
23
I/O Reset input active low
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Terminal Configuration and Functions
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