DS92LX1621_14 Datasheet, PDF (34/48 Pages) Texas Instruments – 10 - 50 MHz DC-Balanced Channel Link III Serializer and Deserializer with Bi-Directional Control Channel

DS92LX1621, DS92LX1622
SNLS327I – MAY 2010 – REVISED JANUARY 2014
www.ti.com
For instance, if BISTEN is held HIGH for 1 second and the PCLK is running at 43 MHz with 16 bpp, then the Bit
Error Rate is no better than 1.46E-9.
Step 4: Place system in Normal Operating Mode by disabling BIST at the Serializer.
Once Step 3 is complete, AT SPEED BIST is over and the Deserializer is out of BIST mode. To fully return to
Normal mode, apply Normal input data into the Serializer.
Any PASS result will remain unless it is changed by a new BIST session or cleared by asserting and releasing
PDB. The default state of PASS after a PDB toggle is HIGH.
It is important to note that AT SPEED BIST will only determine if there is an issue on the link that is not related to
the clock and data recovery of the link (whose status is flagged with LOCK pin).
LVCMOS VDDIO OPTION
1.8V or 3.3V SER Inputs and DES Outputs are user configurable to provide compatibility with 1.8V and 3.3V
system interfaces.
REMOTE WAKE UP (Camera Mode)
After initial power up, the SER is in a low-power Standby mode. The DES (controlled by host controller) 'Remote
Wake-up' register allows the DES side to generate a signal across the link to remotely wake-up the SER. Once
the SER detects the wake-up signal, the SER switches from Standby mode to active mode. In active mode, the
SER locks onto PCLK input (if present), otherwise the on-chip oscillator is used as the input clock source. Note
the host controller should monitor the DES LOCK pin and confirm LOCK = H before performing any I²C
communication across the link.
For Remote Wake-up to function properly:
• The chipset needs to be configured in Camera mode: SER M/S = 0 and DES M/S = 1
• The SER expects remote wake-up by default at power on.
• Configure the control channel driver of the DES to be in remote wake up mode by setting DES register 0x26
to 0xC0.
• Perform remote wake up on SER by setting DES register 0x01 b[2] to 1.
• Return the control channel driver of the DES to the normal operation mode by setting DES register 0x26 to 0.
The SER can also be put into standby mode by programming the DES remote wake up control register 0x01 b[2]
REM_WAKEUP to 0.
POWERDOWN
The SER has a PDB input pin to ENABLE or Powerdown the device. The modes can be controlled by the host
and is used to disable the link to save power when the remote device is not operational. An auto mode is also
available. In this mode, the PDB pin is tied HIGH and the SER switches over to an internal oscillator when the
PCLK stops or not present. When a PCLK starts again, the SER will then lock to the valid input PCLK and
transmits the data to the DES. In powerdown mode, the high-speed driver outputs are static (HIGH).
The DES has a PDB input pin to ENABLE or Powerdown the device. This pin can be controlled by the system
and is used to disable the DES to save power. An auto mode is also available. In this mode, the PDB pin is tied
HIGH and the DES will enter powerdown when the serial stream stops. When the serial stream starts up again,
the DES will lock to the input stream and assert the LOCK pin and output valid data. In powerdown mode, the
Data and PCLK outputs are set by the OSS_SEL control register.
POWER UP REQUIREMENTS AND PDB PIN
It is required to delay and release the PDB input signal after VDD (VDDn and VDDIO) power supplies have
settled to the recommended operating voltages. A external RC network can be connected to the PDB pin to
ensure PDB arrives after all the VDD have stabilized.
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