DS92LX1621_14 Datasheet, PDF (25/48 Pages) Texas Instruments – 10 - 50 MHz DC-Balanced Channel Link III Serializer and Deserializer with Bi-Directional Control Channel

DS92LX1621, DS92LX1622
www.ti.com
SNLS327I – MAY 2010 – REVISED JANUARY 2014
FUNCTIONAL DESCRIPTION
The DS92LX1621 / DS92LX1622 Channel Link III chipset is intended for camera applications. The Serializer/
Deserializer chipset operates from a 10 MHz to 50 MHz pixel clock frequency. The DS92LX1621 transforms a
16-bit wide parallel LVCMOS data bus along with a bi-directional control bus into a single high-speed differential
pair. The high speed serial bit stream contains an embedded clock and DC-balance information which enhances
signal quality to support AC coupling. The DS92LX1622 receives the single serial data stream and converts it
back into a 16-bit wide parallel data bus together with the bi-directional control bus.
The bi-directional channel function of the DS92LX1621 / DS92LX1622 provides bi-directional communication
between the image sensor and the host device (FPGA, frame grabber, display, etc.). The integrated back
channel transfers data bi-directionally over the same differential pair used for video data interface. This interface
offers advantages over other chipsets by eliminating the need for additional wires for programming and control.
The bi-directional control channel is controlled via an I²C port. The bi-directional control channel offers
asynchronous communication and is not dependent on video blanking intervals.
SERIAL FRAME FORMAT
The DS92LX1621 / DS92LX1622 chipset will transmit and receive a pixel of data in the following format:
Figure 24. Serial Bitstream for 28-bit Symbol
The High Speed Forward Channel (HS_FC) is a 28-bit symbol composed of 16 bits of data containing camera
data & control information transmitted from Serializer to Deserializer. CLK1 and CLK0 represent the embedded
clock in the serial stream. CLK1 is always HIGH and CLK0 is always LOW. This data payload is optimized for
signal transmission over an AC coupled link. Data is randomized, balanced and scrambled. The data payload
may be checked using a 4-bit CRC function. The CRC monitors the link integrity of the serialized data and
reports when an error condition is detected.
The bi-directional control data is transferred over the single serial link along with the high-speed forward data.
This architecture provides a full duplex low speed forward and backward path across the serial link together with
a high speed forward channel without the dependence of the video blanking phase.
DESCRIPTION OF BI-DIRECTIONAL CONTROL BUS AND I²C MODES
The I²C compatible interface allows programming of the DS92LX1621, DS92LX1622, or an external remote
device (such as a camera) through the bi-directional control channel. Register programming transactions to/from
the DS92LX1621 / DS92LX1622 chipset are employed through the clock (SCL) and data (SDA) lines. These two
signals have open drain I/Os and both lines must be pulled-up to VDDIO by external resistor. Figure 6 shows the
timing relationships of the clock (SCL) and data (SDA) signals. Pull-up resistors or current sources are required
on the SCL and SDA busses to pull them high when they are not being driven low. A logic zero is transmitted by
driving the output low. A logic high is transmitted by releasing the output and allowing it to be pulled-up
externally. The appropriate pull-up resistor values will depend upon the total bus capacitance and operating
speed. The DS92LX1621 / DS92LX1622 I²C bus data rate supports up to 100 kbps according to I²C
specification.
To start any data transfer, the DS92LX1621 / DS92LX1622 must be configured in the proper I²C mode. Each
device can function as an I²C slave proxy or master proxy depending on the mode determined by M/S pin. The
Ser/Des interface acts as a virtual bridge between Master controller (MCU) and the remote device. When the
M/S pin is set to HIGH, the device is treated as a slave proxy; acts as a slave on behalf of the remote slave.
When addressing a remote peripheral or Serializer/ Deserializer (not wired directly to the MCU), the slave proxy
will forward any byte transactions sent by the Master controller to the target device. When M/S pin is set to LOW,
the device will function as a master proxy device; acts as a master on behalf of the I²C master controller. Note
that the devices must have complementary settings for the M/S configuration. For example, if the Serializer M/S
pin is set to HIGH then the Deserializer M/S pin must be set to LOW and vice-versa.
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