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DS92LX1621_14 Datasheet, PDF (32/48 Pages) Texas Instruments – 10 - 50 MHz DC-Balanced Channel Link III Serializer and Deserializer with Bi-Directional Control Channel
DS92LX1621, DS92LX1622
SNLS327I – MAY 2010 – REVISED JANUARY 2014
www.ti.com
AT-SPEED BIST (BISTEN, PASS)
An optional AT SPEED Built in Self Test (BIST) feature supports at speed testing of the high-speed serial and
the bidirectional control channel link. Control pins at the Deserializer are used to enable the BIST test mode and
allow the system to initiate the test and set the duration. A HIGH on PASS pin indicates that all payloads
received during the test were error free during the BIST duration test. A LOW on this pin at the conclusion of the
test indicates that one or more payloads were detected with errors.
The BIST duration is defined by the width of BISTEN. BIST starts when Deserializer LOCK goes HIGH and
BISTEN is set HIGH. BIST ends when BISTEN goes LOW. Any errors detected after the BIST Duration are not
included in PASS logic. Note: AT-SPEED BIST is only available in the Camera mode and not the Display mode.
The following diagram shows how to perform system AT SPEED BIST:
Serializer MODE = 0 and Deserializer MODE = 1
Apply power for Serializer and Deserializer
Normal
Step 1: Enable AT SPEED BIST by placing the
Deserializer in BIST by mode setting BISTEN = H
Step 4: Place System in
Normal Operating Mode
BISTEN = L
BIST Wait
Step 2: Deserializer will setup Serializer and enable BIST
mode through Bidirectional control channel
communication and then reacquire forward channel clock
BIST Start
Step 3: Stop AT SPEED BIST by turning off BIST
mode with BISTEN = L at the Deserializer.
BIST Stop
Figure 34. AT-SPEED BIST System Flow Diagram
Step 1: Place the Deserializer in BIST Mode.
Serializer and Deserializer power supply must be supplied. Enable the AT SPEED BIST mode on the
Deserializer by setting the BISTEN pin High. The DS92LX1622 GPIO[1:0] pins are used to select the PCLK
frequency of the on-chip oscillator for the BIST test on high speed data path.
DES GPIO [1:0]
00
01
10
11
Table 5. BIST Oscillator Frequency Select
Oscillator Source
External PCLK
Internal
Internal
Internal
min (MHz)
10
typ (MHz)
50
25
12.5
max (MHz)
50
32
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