DS92LX1621_14 Datasheet, PDF (13/48 Pages) Texas Instruments – 10 - 50 MHz DC-Balanced Channel Link III Serializer and Deserializer with Bi-Directional Control Channel

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DS92LX1621, DS92LX1622
SNLS327I – MAY 2010 – REVISED JANUARY 2014
SDA
t_f
SCL
t_LOW
t_r
START
t_HD;STA
t_HD;DAT
t_f
t_HIGH
t_HD;STA
t_SP
t_BUF
t_r
t_SU;DAT
t_SU;STA
REPEATED
START
t_SU;STO
STOP START
Figure 6. Bi-Directional Control Bus Timing
Bi-Directional Control Bus DC Characteristics (SCL, SDA) - I²C Compliant
Symbol
Parameter
Conditions
Min
Typ
V_IH
Input High Level
SDA and SCL
0.7 x
V_DDIO
V_IL
Input Low Level Voltage
SDA and SCL
GND
V_HY
Input Hysteresis
>50
I_OZ
TRI-STATE Output Current PDB = 0V V_OUT = 0V or V_DD
-20
±1
I_IN
Input Current
SDA or SCL, Vin = V_DDIO or GND
-20
±1
C_IN
Input Pin Capacitance
<5
SCL and SDA VDDIO = 3.0V IOL = 1.5
mA
V_OL
Low Level Output Voltage
SCL and SDA VDDIO = 1.71V IOL = 1
mA
Max
V_DDIO
0.3 x
V_DDIO
+20
+20
0.36
0.36
Units
V
V
mV
µA
µA
pF
V
AC Timing Diagrams and Test Circuits
Device Pin Name
PCLK
Signal Pattern
T
ODD D_IN/R_OUT
EVEN D_IN/R_OUT
Figure 7. “Worst Case” Test Pattern
Vdiff
80%
20%
80%
Vdiff = 0V
20%
t_LHT
t_HLT
Vdiff = (D_OUT+) - (D_OUT-)
Figure 8. Serializer CML Output Load and Transition Times
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