TMS320TCI6608_14 Datasheet, PDF (30/244 Pages) Texas Instruments – Multicore Fixed and Floating-Point Digital Signal Processor

TMS320TCI6608
Multicore Fixed and Floating-Point Digital Signal Processor
SPRS623E—March 2014
Table 2-13 SPI Device Configuration Field Descriptions (Part 2 of 2)
Bit
Field
Description
10
4, 5 Pin
SPI operation mode configuration
0 = 4-pin mode used
1 = 5-pin mode used
9
Addr Width
SPI address width configuration
0 = 16-bit address values are used
1 = 24-bit address values are used
8-7
Chip Select
The chip select field value
00b = CS0 and CS1 are both active (not used)
01b = CS1 is active
10b = CS0 is active
11b = None is active
6-3
Parameter Table Index Specifies which parameter table is loaded from SPI. The boot ROM reads the parameter table (each table is 0x80
bytes) from the SPI starting at SPI address (0x80 * parameter index).
The value can range from 0 to 15.
End of Table 2-13
2.5.2.7 HyperLink Boot Device Configuration
Figure 2-10 HyperLink Boot Device Configuration Fields
9
8
7
6
5
Reserved
Data Rate
Ref Clock
Table 2-14 HyperLink Boot Device Configuration Field Descriptions
Bit Field
9
Reserved
8-7 Data Rate
6-5 Ref Clocks
4-3 Reserved
End of Table 2-14
Description
Reserved
HyperLink data rate configuration
0 = 1.25 GBaud
1 = 3.125 GBaud
2 = 6.25 GBaud
3 = Reserved
HyperLink reference clock configuration
0 = 156.25 MHz
1 = 250 MHz
2 = 312.5 MHz
3 = Reserved
Reserved
4
3
Reserved
30 Device Overview
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