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TMS320TCI6608_14 Datasheet, PDF (200/244 Pages) Texas Instruments – Multicore Fixed and Floating-Point Digital Signal Processor
TMS320TCI6608
Multicore Fixed and Floating-Point Digital Signal Processor
SPRS623E—March 2014
7.11.2 MPU Programmable Range Registers
7.11.2.1 Programmable Range n Start Address Register (PROGn_MPSAR)
The programmable address start register holds the start address for the range. This register is writeable only by a
supervisor entity. If NS = 0 (non-secure mode) in the associated MPPA register, then the register is also writeable
only by a secure entity.
The start address must be aligned on a page boundary. The size of the page is 1K byte. The size of the page determines
the width of the address field in MPSAR and MPEAR.
Figure 7-36 Programmable Range n Start Address Register (PROGn_MPSAR)
31
10
9
0
START_ADDR
Reserved
R/W
R
Legend: R = Read only; R/W = Read/Write
Table 7-58 Programmable Range n Start Address Register (PROGn_MPSAR) Field Descriptions
Bit
Field
31 – 10
START_ADDR
9–0
Reserved
End of Table 7-58
Description
Start address for range n.
Reserved and these bits always read as 0.
7.11.2.2 Programmable Range n End Address Register (PROGn_MPEAR)
The programmable address end register holds the end address for the range. This register is writeable only by a
supervisor entity. If NS = 0 (non-secure mode) in the associated MPPA register, then the register is also writeable
only by a secure entity.
The end address must be aligned on a page boundary. The size of the page depends on the MPU number. The page
size for MPU1 is 1K byte and for MPU2 it is 64K bytes. The size of the page determines the width of the address field
in MPSAR and MPEAR
Figure 7-37 Programmable Range n End Address Register (PROGn_MPEAR)
31
10
9
0
END_ADDR
Reserved
R/W
R
Legend: R = Read only; R/W = Read/Write
Table 7-59 Programmable Range n End Address Register (PROGn_MPEAR) Field Descriptions
Bit
Field
31 – 10
END_ADDR
9–0
Reserved
End of Table 7-59
Description
End address for range n.
Reserved and these bits always read as 3FFh.
200 Peripheral Information and Electrical Specifications
Copyright 2014 Texas Instruments Incorporated
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