TMS320TCI6608_14 Datasheet, PDF (238/244 Pages) Texas Instruments – Multicore Fixed and Floating-Point Digital Signal Processor

TMS320TCI6608
Multicore Fixed and Floating-Point Digital Signal Processor
SPRS623E—March 2014
Revision B
Removed section 7.1 Parameter Information (Page 120)
Corrected PASS PLL clock source description from Main PLL mux to CORECLK clock reference sources (Page 156)
Corrected MACID2 address from 0x02600114 to 0x02620114 (Page 226)
Added EMIF16 Electrical Data/Timing section (Page 223)
Added TSIP Electrical Data/Timing section (Page 221)
Updated SPI Timing section (Page 212)
Changed Data Rate 3 to Reserved from 12.5GBs in HyperLink configuration field table (Page 30)
Corrected the Device ID field to be bits 5 to 3 in Ethernet Configuration Field figure and table (Page 27)
Corrected the field bits of No Boot/EMIF16 configuration field figure and table (Page 26)
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Revision A
Added note to RSISO register that both SRIOISO and SRISO will be set by boot ROM code during boot (Page 149)
Removed AIF2ISO from Reset Isolation Register (Page 149)
Added information of on-chip divider (=3) for PA in the PLL Boot Configuration Settings section (Page 38)
Changed "no support for MSI" to "support for legacy INTx" for PCIe in legacy EP mode description in Device Status Register Field Descrip-
tions table (Page 78)
Changed "no support for MSI" to "support for legacy INTx" for PCIe legacy end point description in Device Configuration Pins table
(Page 73)
Added "The packet accelerator is coupled with network coprocessor" in the Packet Accelerator section (Page 225)
Added Network Coprocessor document link (Page 72)
Changed 2 to OUTPUT_DIVIDE in the clock formula in PLL Boot Configuration Settings section (Page 38)
Changed EMAC to GbE switch subsystem (Page 226)
Changed EMAC to Gigabit Ethernet (GbE) Switch Subsystem (Page 228)
Changed EMAC to Gigabit Ethernet Switch (Page 72)
Changed EMAC to Network Coprocessor Packet DMA (Page 98)
Changed PA_SS into Network Coprocessor Packet DMA in Device Master Settings table (Page 192)
Changed PA_SS into PASS in the Clock Sequencing table (Page 127)
Changed Packet Accelerator into Network Coprocessor and corrected the memory address in the memory map summary table (Page 17)
Changed Packet Accelerator into network coprocessor in Security Accelerator section (Page 225)
Changed Packet Accelerator into Network Coprocessor in the Device Configuration Pins table. (Page 73)
Changed Packet Accelerator subsystem into Network Coprocessor (Page 156)
Changed Packet Subsystem to Network Coprocessor (PASS PLL) in Terminal Functions table (Page 44)
Changed PASS into Network Coprocessor (PASS) (Page 141)
Changed PS_SS_CLK PLL to PASS_CLK PLL in Terminal Functions table (Page 44)
Deleted section 5.5 "C66x CorePac Resets" to avoid confusion and the reset details are covered in "Reset Controller" section (Page 108)
Removed EMAC in Characteristics of the device Processor table (Page 13)
Added BGA Package row into Characteristics of Processor table (Page 13)
Corrected End and Bytes of DDR3 EMIF Configuration section in Memory Map Summary table (Page 17)
Corrected BAR number from BAR1/2 to BAR2/3 and BAR3/4 to BAR4/5 in PCIe Window Sizes table (Page 28)
Deleted EDMA3 Peripheral Register Description section, which is covered in EDMA user guide (Page 159)
Added SerDes PLL Status and Config registers (Page 74)
Added "to DDR3 memory space" to the first step of workaround (Page 205)
Added "with TCCMOD=0" after "e.g. EDMA3 transfer controllers" (Page 205)
Added CPTS_RFTCLK_SEL register in GbE Switch Subsystem section (Page 226)
Changed "DSP/2" to "CPU/2" and "DSP/3" to "CPU/3" (Page 98)
Changed the word "can" to "must" in the sentence "for most applications increment mode can be used" to specify it is a hard rule.
(Page 160)
Corrected the tw(RXSTOP15) and tw(RXSTOP2) values in UART Timing Requirements table (Page 219)
Changed "sleep boot" to "No boot" in Sub-Mode field of No boot/EMIF16 Configuration Bit Field Descriptions table (Page 26)
Changed Section 2.5.2.1 title from "Sleep/EMIF16" to "No Boot/EMIF16" (Page 26)
Corrections Applied to I2C Passive Mode Device Configuration Bit Fields (Page 29)
Corrections Applied to I2C Passive Mode Device Configuration Field Descriptions (Page 29)
Modified description of value 0 to EMIF16/No Boot in Boot Device Values table (Page 25)
238 Revision History
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