TM4C1237D5PM_15 Datasheet, PDF (3/1277 Pages) Texas Instruments – Tiva Microcontroller

Tiva^™ TM4C1237D5PM Microcontroller
Table of Contents
Revision History ............................................................................................................................. 36
About This Document .................................................................................................................... 40
Audience .............................................................................................................................................. 40
About This Manual ................................................................................................................................ 40
Related Documents ............................................................................................................................... 40
Documentation Conventions .................................................................................................................. 41
1
1.1
1.2
1.3
1.3.1
1.3.2
1.3.3
1.3.4
1.3.5
1.3.6
1.3.7
1.4
1.5
1.6
Architectural Overview .......................................................................................... 43
Tiva™ C Series Overview .............................................................................................. 43
TM4C1237D5PM Microcontroller Overview ..................................................................... 44
TM4C1237D5PM Microcontroller Features ..................................................................... 46
ARM Cortex-M4F Processor Core .................................................................................. 46
On-Chip Memory ........................................................................................................... 48
Serial Communications Peripherals ................................................................................ 50
System Integration ........................................................................................................ 54
Analog .......................................................................................................................... 60
JTAG and ARM Serial Wire Debug ................................................................................ 62
Packaging and Temperature .......................................................................................... 62
TM4C1237D5PM Microcontroller Hardware Details ......................................................... 62
Kits .............................................................................................................................. 63
Support Information ....................................................................................................... 63
2
2.1
2.2
2.2.1
2.2.2
2.2.3
2.2.4
2.3
2.3.1
2.3.2
2.3.3
2.3.4
2.3.5
2.3.6
2.4
2.4.1
2.4.2
2.4.3
2.4.4
2.4.5
2.4.6
2.4.7
2.5
2.5.1
2.5.2
The Cortex-M4F Processor ................................................................................... 64
Block Diagram .............................................................................................................. 65
Overview ...................................................................................................................... 66
System-Level Interface .................................................................................................. 66
Integrated Configurable Debug ...................................................................................... 66
Trace Port Interface Unit (TPIU) ..................................................................................... 67
Cortex-M4F System Component Details ......................................................................... 67
Programming Model ...................................................................................................... 68
Processor Mode and Privilege Levels for Software Execution ........................................... 68
Stacks .......................................................................................................................... 69
Register Map ................................................................................................................ 69
Register Descriptions .................................................................................................... 71
Exceptions and Interrupts .............................................................................................. 87
Data Types ................................................................................................................... 87
Memory Model .............................................................................................................. 87
Memory Regions, Types and Attributes ........................................................................... 89
Memory System Ordering of Memory Accesses .............................................................. 90
Behavior of Memory Accesses ....................................................................................... 90
Software Ordering of Memory Accesses ......................................................................... 91
Bit-Banding ................................................................................................................... 92
Data Storage ................................................................................................................ 94
Synchronization Primitives ............................................................................................. 95
Exception Model ........................................................................................................... 96
Exception States ........................................................................................................... 97
Exception Types ............................................................................................................ 97
June 12, 2014
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