TM4C1237D5PM_15 Datasheet, PDF (213/1277 Pages) Texas Instruments – Tiva Microcontroller

Tiva^™ TM4C1237D5PM Microcontroller
5.2.3
5.2.3.1
5.2.3.2
5.2.4
3. The internal reset is released and the microcontroller loads from memory the initial stack pointer,
the initial program counter, and the first instruction designated by the program counter, and
then begins execution.
For more information on the Watchdog Timer module, see “Watchdog Timers” on page 750.
The watchdog reset timing is shown in Figure 22-13 on page 1239.
Non-Maskable Interrupt
The microcontroller has four sources of non-maskable interrupt (NMI):
■ The assertion of the NMI signal
■ A main oscillator verification error
■ The NMISET bit in the Interrupt Control and State (INTCTRL) register in the Cortex^™-M4F (see
page 155).
■ The Watchdog module time-out interrupt when the INTTYPE bit in the Watchdog Control
(WDTCTL) register is set (see page 756).
Software must check the cause of the interrupt in order to distinguish among the sources.
NMI Pin
The NMI signal is an alternate function for either GPIO port pin PD7 or PF0. The alternate function
must be enabled in the GPIO for the signal to be used as an interrupt, as described in
“General-Purpose Input/Outputs (GPIOs)” on page 625. Note that enabling the NMI alternate function
requires the use of the GPIO lock and commit function just like the GPIO port pins associated with
JTAG/SWD functionality, see page 661. The active sense of the NMI signal is High; asserting the
enabled NMI signal above V_IH initiates the NMI interrupt sequence.
Main Oscillator Verification Failure
The TM4C1237D5PM microcontroller provides a main oscillator verification circuit that generates
an error condition if the oscillator is running too fast or too slow. If the main oscillator verification
circuit is enabled and a failure occurs, either a power-on reset is generated and control is transferred
to the NMI handler, or an interrupt is generated. The MOSCIM bit in the MOSCCTL register determines
which action occurs. In either case, the system clock source is automatically switched to the PIOSC.
If a MOSC failure reset occurs, the NMI handler is used to address the main oscillator verification
failure because the necessary code can be removed from the general reset handler, speeding up
reset processing. The detection circuit is enabled by setting the CVAL bit in the Main Oscillator
Control (MOSCCTL) register. The main oscillator verification error is indicated in the main oscillator
fail status (MOSCFAIL) bit in the Reset Cause (RESC) register. The main oscillator verification circuit
action is described in more detail in “Main Oscillator Verification Circuit” on page 221.
Power Control
The TM4C1237D5PM microcontroller provides an integrated LDO regulator that is used to provide
power to the majority of the microcontroller's internal logic. Figure 5-4 shows the power architecture.
An external LDO may not be used.
Note: VDDA must be supplied with a voltage that meets the specification in Table 22-5 on page 1228,
or the microcontroller does not function properly. VDDA is the supply for all of the analog
circuitry on the device, including the clock circuitry.
June 12, 2014
213
Texas Instruments-Production Data