DS90UH929-Q1 Datasheet, PDF (29/77 Pages) Texas Instruments – 720p HDMI to FPD-Link III Bridge Serializer with HDCP

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DS90UH929-Q1
SNLS458 – NOVEMBER 2014
#
Ratio
V_R6/V_DD18
5
0.553
6
0.668
7
0.789
8
1
Table 6. Configuration Select (MODE_SEL1) (continued)
Target V_R6
(V)
0.995
1.202
1.420
1.8
Suggested
Resistor Pull-Up
R5 kΩ (1% tol)
Suggested
Resistor Pull-
Down R6 kΩ (1%
tol)
82.5
102
68.1
137
56.2
210
13.3
OPEN
EXT_CTL
1
1
1
1
COAX
0
0
1
1
REM_EDID_LOA
D
0
1
0
1
The strapped values can be viewed and/or modified in the following locations:
• EDID_SEL : Latched into BRIDGE_CTL[0], EDID_DISABLE (0x4F[0]).
• AUTO_SS : Latched into SOFT_SLEEP (0x01[7]).
• AUX_I2S : Latched into BRIDGE_CFG[1], AUDIO_MODE[1] (0x54[1]).
• EXT_CTL: Latched into BRIDGE_CFG[7], EXT_CONTROL (0x54[7]).
• COAX : Latched into DUAL_CTL1[7], COAX_MODE (0x5B[7]).
• REM_EDID_LOAD : Latched into BRIDGE_CFG[5] (0x54[5]).
8.4.2 FPD-Link III Single Link Operation
The DS90UH929-Q1's single link mode transmits the video over a single FPD-Link III to a single receiver. Single
link mode supports frequencies up to 96MHz for 24-bit video when paired with the DS90UH940-Q1/DS90UH948-
Q1. This mode is compatible with the DS90UH926Q-Q1/DS90UH928Q-Q1 when operating below 85MHz.
8.5 Programming
8.5.1 Serial Control Bus
This serializer may also be configured by the use of a I2C compatible serial control bus. Multiple devices may
share the serial control bus (up to 8 device addresses supported). The device address is set via a resistor divider
(R1 and R2 — see Figure 17 below) connected to the IDx pin.
VDD18
HOST
SCL
SDA
VDDI2C
R1
VR2
IDx
4.7k
4.7k
R2
SER
SCL
SDA
To other
Devices
Figure 17. Serial Control Bus Connection
The serial control bus consists of two signals, SCL and SDA. SCL is a Serial Bus Clock Input. SDA is the Serial
Bus Data Input / Output signal. Both SCL and SDA signals require an external pull-up resistor to V_DD18 or V_DD33.
For most applications, a 4.7kΩ pull-up resistor is recommended. However, the pull-up resistor value may be
adjusted for capacitive loading and data rate requirements. The signals are either pulled High, or driven Low.
The IDx pin configures the control interface to one of 8 possible device addresses. A pull-up resistor and a pull-
down resistor may be used to set the appropriate voltage on the IDx input pin See Table 8 below.
#
Ratio
V_R2 / V_DD18
1
0
Table 7. Serial Control Bus Addresses For IDx
Ideal V_R2
(V)
0
Suggested Resistor Suggested Resistor
R1 kΩ (1% tol)
R2 kΩ (1% tol)
OPEN
40.2
7-Bit Address
0x0C
8-Bit Address
0x18
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