CC3220MOD_017 Datasheet, PDF (26/100 Pages) Texas Instruments – SimpleLink Wi-Fi CERTIFIED Wireless MCU Modules

CC3220MOD, CC3220MODA
SWRS206B – MARCH 2017 – REVISED AUGUST 2017
www.ti.com
Pkg.
Pin
33
34
35
36
37
38
39
40
41
42
Table 4-4. Pin Attributes and Pin Multiplexing (continued)
GENERAL PIN ATTRIBUTES
Pin Alias
Use
Select as
Wakeup
Source
Config.
Addl.
Analog
Mux
NC
WLAN
analog
N/A
N/A
SOP0
Config
sense
N/A
N/A
nRESET
Global
reset
N/A
N/A
VBAT_
RESET
Global
reset
N/A
N/A
Muxed
With
JTAG
N/A
N/A
N/A
N/A
Dig. Pin Mux
Config. Reg.
Dig.
Pin
Mux
Config.
Mode
Value
N/A
N/A
N/A
N/A
N/A
N/A
N/A
VBAT1
Supply
input
N/A
N/A
N/A
N/A
N/A
GND
GND
N/A
NC
WLAN
analog
N/A
VBAT2
Supply
input
N/A
NC
WLAN
analog
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
0
9
GPIO30
I/O
2
No
User
config not
required
(8)
No
GPIO_PAD_
CONFIG_30
(0x4402 E118)
3
4
7
FUNCTION
PAD STATES
Signal Name
Signal
Description
Signal
Direction
LPDS⁽¹⁾
Hib⁽²⁾
nRESET = 0
NC
Reserved
SOP0
Sense-on-power 0 N/A
N/A
N/A
N/A
nRESET
Master chip reset.
Active low.
N/A
N/A
N/A
N/A
VBAT_RESET
VBAT to nRESET
pullup resistor
N/A
N/A
N/A
N/A
Analog DC/DC
VBAT1
input (connected to
chip input supply
N/A
N/A
N/A
N/A
[VBAT])
GND
GND
N/A
N/A
N/A
N/A
NC
Reserved
N/A
N/A
N/A
N/A
VBAT2
Analog input
supply VBAT
N/A
N/A
N/A
N/A
NC
Reserved
N/A
N/A
N/A
N/A
GPIO30
GPIO
Hi-Z,
I/O
Pull,
Drive
UART0_TX UART0 TX data
O
1
McACLK
McAFSX
I2S audio port
clock
I2S audio port
frame sync
Hi-Z,
O
Pull,
Drive
Hi-Z,
Hi-Z,
Pull,
Hi-Z
O
Pull,
Drive
Drive
GT_CCP05 Timer capture port
I
Hi-Z,
Pull,
Drive
GSPI_MISO General SPI MISO
I/O
Hi-Z,
Pull,
Drive
26
Terminal Configuration and Functions
Submit Documentation Feedback
Product Folder Links: CC3220MOD CC3220MODA
Copyright © 2017, Texas Instruments Incorporated