LM4F111E5QR Datasheet, PDF (253/1114 Pages) Texas Instruments – Microcontroller

Stellaris^® LM4F111E5QR Microcontroller
Register 16: PLL Frequency 1 (PLLFREQ1), offset 0x164
This register always contains the current Q and N values presented to the system PLL.
The M value is shown in the PLLFREQ0 register. Table 21-10 on page 1059 shows the M, Q, and N
values as well as the resulting PLL frequency for the various XTAL configurations.
PLL Frequency 1 (PLLFREQ1)
Base 0x400F.E000
Offset 0x164
Type RO, reset 0x0000.0001
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
Q
reserved
N
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
Bit/Field
31:13
12:8
7:5
4:0
Name
reserved
Q
reserved
N
Type
RO
RO
RO
RO
Reset Description
0x0000.0
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0
PLL Q Value
This field contains the PLL Q value.
0x0
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x1
PLL N Value
This field contains the PLL N value.
April 25, 2012
253
Texas Instruments-Advance Information