DAC38RF86 Datasheet, PDF (24/141 Pages) Texas Instruments – Dual- or Single-Channel, Single-Ended, 14-bit, 9-GSPS, RF-Sampling DAC with JESD204B Interface and On-Chip GSM PLL

DAC38RF86, DAC38RF87
DAC38RF97, DAC38RF96
SLASEF4 – FEBRUARY 2017
Functional Block Diagrams (continued)
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DACCLK+
DACCLK-
DACCLKSE
SYSREF+
SYSREF-
RX[4..7]+
RX[4..7]-
SYNC2\+
SYNC2\-
VDDT1
VDDR18
RX[0..3]+
RX[0..3]-
SYNC1\+
SYNC1\-
VDDS18
AMUX0/1
IFORCE
VSENSE
Low Jitter
PLL
Clock
Distribution
Single-band DUC Channel 2
Divider
/2, /3, /4
I
Q
NCO 2
x
sin(x)
Single-band DUC Channel 1
I
Q
NCO 1
x
sin(x)
Control Interface
Temp
Sensor
DACB
Gain
14-b
DAC
CLKTX+
CLKTX-
VDDTX1
VDDTX18
VOUT2
VDDOUT18
0.9 V
EXTIO
Ref
RBIAS
TESTMODE
14-b
DAC
DACA
Gain
JTAG
VOUT1
VEE18N
VDDA18
ATEST
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Figure 25. DAC38RF96, DAC38RF97 Block Diagram
24
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