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DAC38RF86 Datasheet, PDF (1/141 Pages) Texas Instruments – Dual- or Single-Channel, Single-Ended, 14-bit, 9-GSPS, RF-Sampling DAC with JESD204B Interface and On-Chip GSM PLL
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DAC38RF86, DAC38RF87
DAC38RF97, DAC38RF96
SLASEF4 – FEBRUARY 2017
DAC38RFxx: Dual- or Single-Channel, Single-Ended,
14-bit, 9-GSPS, RF-Sampling DAC with JESD204B Interface and On-Chip GSM PLL
1 Features
•1 14-Bit Resolution
• Maximum DAC Sample Rate: 9 GSPS
• Key Specifications:
– RF Full Scale Output Power at 2.1 GHz:0 dBm
– Spectral Performance
– fDAC = 5898.24 MSPS, fOUT = 2.14 GHz
– WCDMA ACLR: 73 dBc
– WCDMA alt-ACLR: 77 dBc
– fDAC = 8847.36 MSPS, fOUT = 3.7 GHz
– 20 MHz LTE ACLR: 66 dBc
– fDAC = 9 GSPS, fOUT = 1.8 GHz
– IMD3 = 70 dBc (–6 dBFS, 10 MHz tone
spacing)
– NSD = –157 dBc/Hz
• Dual-Band Digital Upconverter per DAC
– Max Input Rate: 1 Band: 1250 MSPS
Complex, 2 bands: 625 MSPS Complex Each
– 6, 8, 10, 12, 16, 18, 20 or 24x Interpolation
– 4 Independent NCOs with 48-Bit Resolution
• JESD204B Interface
– Subclass 1 Support for Multi-chip
Synchronization
– Maximum Lane Rate: 12.5 Gbps
• Single-Ended Output with Integrated Balun
Covering 700–3800 MHz
• Internal PLL and VCO with Bypass
– DAC38RF86/96: fC(VCO) = 8.9 GHz
– DAC38RF87/97: fC(VCO) = 5.9 GHz
• Power Dissipation: 1.4 – 2.2 W/ch
• Power Supplies: –1.8 V, 1.0 V, 1.8 V
• Package: 10 x 10 mm BGA, 0.8 mm Pitch,
144-Balls
3 Description
The DAC38RFxx is a family of high-performance,
dual/single-channel, 14-bit, 9-GSPS, RF-sampling
digital-to-analog converters (DACs) that are capable
of synthesizing wideband signals from 0 to 4.5 GHz.
A high dynamic range allows the DAC38RFxx family
to generate 3G/4G signals for wireless basestations
with an output frequency up to 4 GHz.
The devices feature a low-power JESD204B Interface
with up to 8 lanes, and provides a maximum bit rate
of 12.5 Gbps and input sample rate of 1.25 GSPS
complex per channel. The DAC38RFxx provides two
digital upconverters per DAC, with multiple
interpolation rates and a digital quadrature modulator
with independent, frequency flexible NCOs. An
optional low-jitter PLL/VCO simplifies the DAC clock
generation by allowing use of a lower frequency
reference clock.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
DAC38RF86
DAC38RF96
DAC38RF87
FCBGA (144)
10.0 mm x 10.0 mm
DAC38RF97
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
2x20 MHz LTE at 1.84 GHz and 2.14 GHz,
800 MHz Span
2 Applications
• Wireless Communications
• Radar
• Communications Test Equipment
• Arbitrary Waveform Generators
• Military Software Defined Radio
• Satellite Communications (SATCOM)
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.