DS90UA101-Q1 Datasheet, PDF (23/42 Pages) Texas Instruments – DS90UA101-Q1 Multi-Channel Digital Audio Link

DS90UA101-Q1
www.ti.com
SNLS441A – JULY 2013 – REVISED SEPTEMBER 2013
Bit Clock (BCK)
The bit clock pulses once for each discrete bit of data on the data lines. The bit clock frequency must be greater
than or equal to the product of the sample rate, the number of bits per sample and the number of channels
(which is 2 in normal stereo operation).
Word Select (LRCK)
The word select line indicates the channel being transmitted:
• LRCK = 0; channel 1 (left);
• LRCK = 1; channel 2 (right).
The LRCK line changes one clock period before the MSB is transmitted (Figure 16). This allows the slave
transmitter to derive synchronous timing of the serial data that will be set up for transmission. Furthermore, it
enables the receiver to store the previous word and clear the input for the next word.
Serial Data (DATA)
Serial data is transmitted in two’s complement with the MSB first (as shown in Figure 16). The MSB is
transmitted first because the transmitter and receiver may have different word lengths.
If the receiver is sent more bits than its word length, the bits after the LSB are ignored. On the other hand, if the
receiver is sent fewer bits than its word length, the missing bits are set to zero internally. And so, the MSB has a
fixed position, whereas the position of the LSB depends on the word length.
Serial data sent by the transmitter may be synchronized with either the trailing (HIGH-to-LOW) or the leading
(LOW-to-HIGH) edge of the clock signal. However, the serial data must be latched into the receiver on the
leading edge of the serial clock signal, and so there are some restrictions when transmitting data that is
synchronized with the leading edge.
LRCK
LEFT Channel Data
RIGHT Channel Data
BCK
DIN
MSB
210
LSB
MSB
Figure 16. Stereo I²S Format
210
LSB
Left Justified Format
In this format, MSB of the word appears in synchronization with the LRCK edges. Unlike in I²S mode, there is no
lag between Data and LRCK. Left channel data word begins at falling edge of LRCK and right channel data word
begins on rising edge of the LRCK signal. Hence, as can be seen from below waveforms (Figure 17), data
appears to be left justified.
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