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DS90UA101-Q1 Datasheet, PDF (10/42 Pages) Texas Instruments – DS90UA101-Q1 Multi-Channel Digital Audio Link
DS90UA101-Q1
SNLS441A – JULY 2013 – REVISED SEPTEMBER 2013
ELECTRICAL CHARACTERISTICS:
Serializer Switching Characteristics
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Over recommended operating supply and temperature ranges unless otherwise specified.(1)(2)(3)
Symbol
Parameter
Conditions
Min
Typ
tLHT
CML Low-to-High Transition RL = 100Ω (Figure 6)
Time
150
tHLT
CML High-to-Low Transition RL = 100Ω (Figure 6)
Time
150
tDIS
Data Input Setup to SCK
Serializer Data Inputs
2
tDIH
Data Input Hold from SCK (Figure 10)
2
tPLD
Serializer PLL Lock Time
RL = 100Ω (4) (5), (Figure 11)
1
tSD
Serializer Delay (5)
RT = 100Ω
Register 0x03h b[0] (TRFB = 1)
11.75T
13T
(Figure 12)
tJIND
Serializer Output
Serializer output intrinsic deterministic
Deterministic Jitter
jitter . Measured (cycle-cycle) with
PRBS-7 test pattern
(3) (6)
0.13
tJINR
Serializer Output Random Serializer output intrinsic random jitter
Jitter
(cycle-cycle). Alternating-1,0 pattern.
(3) (6)
0.04
tJINT
Peak-to-peak Serializer
Serializer output peak-to-peak jitter
Output Jitter
includes deterministic jitter, random
jitter, and jitter transfer from Serializer
input. Measured (cycle-cycle) with
PRBS-7 test pattern.
(3) (6)
0.396
λSTXBW
δSTX
δSTXf
Serializer Jitter Transfer
Function -3 dB Bandwidth(7)
Serializer Jitter Transfer
Function (Peaking) (7)
Serializer Jitter Transfer
Function (Peaking
Frequency) (7)
SCK = 50MHz
SCK = 50MHz
SCK = 50MHz
2.2
1.16
600
Max
330
330
2
15T
Units
ps
ps
ns
ns
ms
ns
UI
UI
UI
MHz
dB
kHz
(1) The Electrical Characteristics tables list verified specifications under the listed Recommended Operating Conditions except as otherwise
modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not
verified.
(2) Current into device pins is defined as positive. Current out of a device pin is defined as negative. Voltages are referenced to ground
except VOD, ΔVOD, VTH and VTL which are differential voltages.
(3) Typical values represent most likely parametric norms at 1.8V or 3.3V, TA = +25°C, and at the Recommended Operation Conditions at
the time of product characterization and are not verified.
(4) tPLD and tDDLT is the time required by the Serializer and Deserializer to obtain lock when exiting power-down state with an active SCK.
(5) Specification is verified by design.
(6) UI – Unit Interval is equivalent to one ideal serialized data bit width. The UI scales with SCK frequency.
(7) Specification is by characterization and is not tested in production.
10
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