DRV8850_16 Datasheet, PDF (22/30 Pages) Texas Instruments – Low-Voltage H-Bridge IC with LDO Voltage Regulator

DRV8850
SLVSCC0B – NOVEMBER 2013 – REVISED DECEMBER 2015
10.2 Layout Example
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Figure 22. Layout Recommendation
10.3 Thermal Considerations
The DRV8850 device has thermal shutdown (TSD) as described in Thermal Shutdown (TSD). If the die
temperature exceeds approximately t_TSD, the device will be disabled until the temperature drops to a safe level.
Any tendency of the device to enter thermal shutdown is an indication of either excessive power dissipation,
insufficient heatsinking, or too high an ambient temperature.
10.3.1 Power Dissipation
Power dissipation in the DRV8850 device is the sum of the motor driver power dissipation and the LDO voltage
regulator dissipation.
The LDO dissipation is calculated simply by (V_IN – V_OUT) × I_OUT.
The power dissipation in the motor driver is dominated by the power dissipated in the output FET resistance, or
R_DS(ON). Power dissipation can be estimated by:
P_TOT
2
LS _ R_DS(ON) HS _ R_DS(ON) x I_{OUT (RMS)}
where
• P_TOT is the total power dissipation
• R_DS(ON) is the resistance of each FET
• I_OUT(RMS) is the RMS output current being driven
(4)
The maximum amount of power that can be dissipated in the device is dependent on ambient temperature and
heat sinking.
Note that R_DS(ON) increases with temperature, so as the device heats, the power dissipation increases.
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