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DRV8850_16 Datasheet, PDF (12/30 Pages) Texas Instruments – Low-Voltage H-Bridge IC with LDO Voltage Regulator
DRV8850
SLVSCC0B – NOVEMBER 2013 – REVISED DECEMBER 2015
7.2 Functional Block Diagram
2.0 to
5.5 V LDOEN
VCP
VCC
VCC
VCC
IN1H
IN1L
LDO
VCC
Regulator
VCC
Charge
Pump
Overvolt
Undervolt
VCC
Over-
Temp
Osc
Gate
Drive
OCP
ISEN
Logic
VCC
IN2H
IN2L
nSLEEP
Gate
Drive
OCP
ISEN
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LDOOUT
LDOOUT
LDOFB
SR
OUT1
OUT1
OUT1
DCM
OUT2
OUT2
OUT2
VPROPI
GND GND GND GND PPAD
7.3 Feature Description
7.3.1 Power Supervisor
The LDO regulator can be active independent of the nSLEEP pin. This independence allows a microcontroller, or
other device, to be powered by the LDO voltage regulator, while retaining the ability to put the DRV8850 device
into sleep mode.
Because of this functionality, nSLEEP and LDOEN must both be brought logic low to minimize power
consumption in sleep mode. If the LDO regulator remains active in sleep mode, a quiescent current of IVCQ2
(typically 50 µA plus current through the external feedback resistors) is drawn from the supply.
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