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TI380FPA Datasheet, PDF (20/24 Pages) Texas Instruments – PACKETBLASTER™
TI380FPA
PACKETBLASTERā
SPWS011A − MARCH 1995 − REVISED AUGUST 1995
PARAMETER MEASUREMENT INFORMATION
FPA-slave timing: status monitoring
tM is the cycle time of one-eighth of a local-memory cycle (20.83 ns minimum).
NO.
100 Setup time, valid bus status on MADH0 −MADH7 after MBCLK1 falling edge, FPA-slave cycle
101 Hold time, valid bus status on MADH0 −MADH7 after MBCLK1 falling edge, FPA-slave cycle
MIN
2tM − 5
2tM + 10
MAX
UNIT
ns
ns
tM
MBCLK1
M8 M1 M2 M3 M4 M5 M6 M7 M8 M1
MADH0 −MADH7
Address
101
100
Status
Data
Figure 11. FPA-Slave Timing: Status Monitoring
FPA-bus arbitration: arbitration handshake
tM is the cycle time of one-eighth of a local-memory cycle (20.83 ns minimum).
NO.
76 Setup time, MBRQ output low before MBCLK1 falling edge, FPA-bus request
77 Hold time, MBRQ output low after MBCLK1 falling edge, FPA-bus request
78 Delay time, MBGR low after MBCLK1 falling edge, bus granted to FPA
81 Setup time, MBRQ input valid before MBCLK1 falling edge, request override
82 Hold time, MBRQ input valid before MBCLK1 falling edge, request override
83 Delay time, MBGR high after MBCLK1 falling edge, bus taken from FPA
MIN
10
3tM
10
0
tM
0
MAX
UNIT
ns
ns
ns
ns
ns
ns
M8 M1 M2 M3 M4 M5 M6 M7 M8 M1 M2 M3 M4 M5 M6 M7 M8
MBCLK1
76
77
MBRQ
78
MBGR
81
82
83
Figure 12. FPA-Bus Arbitration: Arbitration Handshake
20
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