TCA6408A-Q1 Datasheet, PDF (20/40 Pages) Texas Instruments – Low-Voltage 8-Bit I2C and SMBus I/O Expander With Interrupt Output

TCA6408A-Q1
SCPS234 – SEPTEMBER 2016
Programming (continued)
– Master-receiver terminates the transfer with a STOP condition.
SCL
SDA
ST AR T
Condition
Data Transfer
STOP
Condition
Figure 23. Definition of Start and Stop Conditions
SDA line stable while SCL line is high
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SCL
1
0
1
0
1
0
1
0
ACK
SDA
MS B
Bit
Bit
Bit
Bit
Bit
Bit
LSB
ACK
Byte: 1010 1010 ( 0xAAh )
Figure 24. Bit Transfer
Table 2 shows the interface definition for the TCA6408A-Q1 device.
BYTE
I²C slave address
I/O data bus
7 (MSB)
L
P7
Table 2. Interface Definition
BIT
6
5
4
3
H
L
L
L
P6
P5
P4
P3
2
1
0 (LSB)
L
ADDR
R/W
P2
P1
P0
8.5.2 Bus Transactions
Data must be sent to and received from the slave devices, and this is accomplished by reading from or writing to
registers in the slave device.
20
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