TCA6408A-Q1 Datasheet, PDF (19/40 Pages) Texas Instruments – Low-Voltage 8-Bit I2C and SMBus I/O Expander With Interrupt Output

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TCA6408A-Q1
SCPS234 – SEPTEMBER 2016
8.4 Device Functional Modes
8.4.1 Power-On Reset (POR)
When power (from 0 V) is applied to V_CCP, an internal power-on reset holds the TCA6408A-Q1 in a reset
condition until V_CCP has reached V_PORR. At that time, the reset condition is released, and the TCA6408A-Q1
registers and I²C/SMBus state machine initialize to their default states. After that, V_CCP must be lowered to below
V_PORF and back up to the operating voltage for a power-reset cycle.
8.4.2 Powered-Up
When power has been applied to both V_CCP and V_CCI and a POR has taken place, the device is in a functioning
mode. The device is always ready to receive new requests via the I²C bus.
8.5 Programming
8.5.1 I²C Interface
The TCA6408A-Q1 has a standard bidirectional I²C interface that is controlled by a master device in order to be
configured or read the status of this device. Each slave on the I²C bus has a specific device address to
differentiate between other slave devices that are on the same I²C bus. Many slave devices require configuration
upon startup to set the behavior of the device. This is typically done when the master accesses internal register
maps of the slave, which have unique register addresses. A device can have one or multiple registers where
data is stored, written, or read.
The physical I²C interface consists of the serial clock (SCL) and serial data (SDA) lines. Both SDA and SCL lines
must be connected to V_CC through a pull-up resistor. The size of the pull-up resistor is determined by the amount
of capacitance on the I²C lines. (For further details, see the application report, I²C Pull-up Resistor Calculation
(SLVA689)). Data transfer may be initiated only when the bus is idle. A bus is considered idle if both SDA and
SCL lines are high after a STOP condition. See Figure 23 and Figure 24.
The following is the general procedure for a master to access a slave device:
1. If a master wants to send data to a slave:
– Master-transmitter sends a START condition and addresses the slave-receiver.
– Master-transmitter sends data to slave-receiver.
– Master-transmitter terminates the transfer with a STOP condition.
2. If a master wants to receive or read data from a slave:
– Master-receiver sends a START condition and addresses the slave-transmitter.
– Master-receiver sends the requested register to read to slave-transmitter.
– Master-receiver receives data from the slave-transmitter.
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