TCA6408A-Q1 Datasheet, PDF (18/40 Pages) Texas Instruments – Low-Voltage 8-Bit I2C and SMBus I/O Expander With Interrupt Output

TCA6408A-Q1
SCPS234 – SEPTEMBER 2016
www.ti.com
8.3 Feature Description
8.3.1 Voltage Translation
Table 1 shows some common supply voltage options for voltage translation between the I²C bus and the P-ports
of the TCA6408A-Q1.
Table 1. Voltage Translation
V_CCI
(SCL AND SDA OF I²C MASTER)
(V)
1.8
1.8
1.8
2.5
2.5
2.5
3.3
3.3
3.3
V_CCP
(P-PORT)
(V)
1.8
2.5
3.3
1.8
2.5
3.3
1.8
2.5
3.3
8.3.2 I/O Port
When an I/O is configured as an input, FETs Q1 and Q2 are off, which creates a high-impedance input. The
input voltage may be raised above V_CC to a maximum of 3.6 V.
If the I/O is configured as an output, Q1 or Q2 is enabled, depending on the state of the output port register. In
this case, there are low-impedance paths between the I/O pin and either V_CC or GND. The external voltage
applied to this I/O pin must not exceed the recommended levels for proper operation.
8.3.3 Interrupt Output (INT)
An interrupt is generated by any rising or falling edge of the port inputs in the input mode. After time t_iv, the signal
INT is valid. Resetting the interrupt circuit is achieved when data on the port is changed to the original setting or
when data is read from the port that generated the interrupt. Resetting occurs in the read mode at the
acknowledge (ACK) or not acknowledge (NACK) bit after the rising edge of the SCL signal. Interrupts that occur
during the ACK or NACK clock pulse can be lost (or be very short) due to the resetting of the interrupt during this
pulse. Each change of the I/Os after resetting is detected and is transmitted as INT.
Reading from or writing to another device does not affect the interrupt circuit, and a pin configured as an output
cannot cause an interrupt. Changing an I/O from an output to an input may cause a false interrupt to occur if the
state of the pin does not match the contents of the Input Port register.
The INT output has an open-drain structure and requires pull-up resistor to V_CCP or V_CCI, depending on the
application. INT must be connected to the voltage source of the device that requires the interrupt information.
8.3.4 Reset Input (RESET)
The RESET input can be asserted to initialize the system while keeping the V_CCP at its operating level. A reset
can be accomplished by holding the RESET pin low for a minimum of t_W. The TCA6408A-Q1 registers and
I²C/SMBus state machine are changed to their default state when RESET is low (0). When RESET is high (1),
the I/O levels at the P-port can be changed externally or through the master. This input requires a pull-up resistor
to V_CCI, if no active connection is used. It is not recommended to assert the RESET pin during communication
with the TCA6408A-Q1. Assertion of RESET during communication can result in data corruption.
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