TMS320C6472_16 Datasheet, PDF (192/269 Pages) Texas Instruments – TMS320C6472 Fixed-Point Digital Signal Processor

TMS320C6472
SPRS612G – JUNE 2009 – REVISED JULY 2011
Table 7-61. TX/RX Channels 0-5 Error Registers (continued)
HEX ADDRESS RANGE
0250 0254
0250 0258
0250 025C
ACRONYM
ERRCNT5
ERRQ5
-
REGISTER NAME
TX/RX Channel 5 Error Count Register
TX/RX Channel 5 Error Queue Register
Reserved
HEX ADDRESS RANGE
0250 0800 - 0250 081C
0250 0820 - 0250 083C
0250 0840 - 0250 085C
0250 0860 - 0250 087C
0250 0880 - 0250 089C
0250 08A0 - 0250 08BC
0250 08C0 - 0250 0BFC
0250 0C00 - 0250 0C1C
0250 0C20 - 0250 0C3C
0250 0C40 - 0250 0C5C
0250 0C60 - 0250 0C7C
0250 0C80 - 0250 0C9C
0250 0CA0 - 0250 0CBC
0250 0CC0 - 0250 0FFC
Table 7-62. TDMU Channel Registers
ACRONYM
-
-
-
-
-
-
-
-
-
-
-
-
-
-
REGISTER NAME
Transmit Channel 0 Registers
Transmit Channel 1 Registers
Transmit Channel 2 Registers
Transmit Channel 3 Registers
Transmit Channel 4 Registers
Transmit Channel 5 Registers
Reserved
Receive Channel 0 Registers
Receive Channel 1 Registers
Receive Channel 2 Registers
Receive Channel 3 Registers
Receive Channel 4 Registers
Receive Channel 5 Registers
Reserved
HEX ADDRESS RANGE
0250 0800
0250 0804 - 0250 081C
0250 0820
0250 0824 - 0250 083C
0250 0840
0250 0844 - 0250 085C
0250 0860
0250 0864 - 0250 087C
0250 0880
0250 0884 - 0250 089C
0250 08A0
0250 08A4 - 0250 08BC
Table 7-63. TDMU Transmit Channels 0-5 Registers
ACRONYM
XCHEN0
-
XCHEN1
-
XCHEN2
-
XCHEN3
-
XCHEN4
-
XCHEN5
-
REGISTER NAME
Transmit Channel 0 Enable Register
Reserved
Transmit Channel 1 Enable Register
Reserved
Transmit Channel 2 Enable Register
Reserved
Transmit Channel 3 Enable Register
Reserved
Transmit Channel 4 Enable Register
Reserved
Transmit Channel 5 Enable Register
Reserved
HEX ADDRESS RANGE
0250 0C00
0250 0C04 - 0250 0C1C
0250 0C20
0250 0C24 - 0250 0C3C
0250 0C40
0250 0C44 - 0250 0C5C
0250 0C60
0250 0C64 - 0250 0C7C
Table 7-64. TDMU Receive Channels 0-5 Registers
ACRONYM
RCHEN0
-
RCHEN1
-
RCHEN2
-
RCHEN3
-
REGISTER NAME
Receive Channel 0 Enable Register
Reserved
Receive Channel 1 Enable Register
Reserved
Receive Channel 2 Enable Register
Reserved
Receive Channel 3 Enable Register
Reserved
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192 C64x+ Peripheral Information and Electrical Specifications
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