TMS320C6472_16 Datasheet, PDF (187/269 Pages) Texas Instruments – TMS320C6472 Fixed-Point Digital Signal Processor

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HCS
TMS320C6472
SPRS612G – JUNE 2009 – REVISED JULY 2011
HAS
12
12
11
11
HCNTL[1:0]
12
12
11
11
HR/W
12
12
11
11
HHWIL
HSTROBE^(A)
HD[15:0]
9
37
1
3
10
13
37
14
1
2
3
10
9
13
2
36
HRDY^(B)
7
38
6
A. HSTROBE refers to the following logical operation on HCS, HDS1, and HDS2: [NOT(HDS1 XOR HDS2)] OR HCS.
B. Depending on the type of write or read operation (HPID without auto-incrementing; HPIA, HPIC, or HPID with
auto-incrementing) and the state of the FIFO, transitions on HRDY may or may not occur.
For more detailed information on the HPI peripheral, see the TMS320C6472/TMS320TCI6486 DSP Host Port
Interface (HPI) User's Guide (literature number SPRUEG1).
Figure 7-42. HPI16 Read Timing (HAS Used)
Copyright © 2009–2011, Texas Instruments Incorporated
C64x+ Peripheral Information and Electrical Specifications 187
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