SN74AUP1G80_17 Datasheet, PDF (17/38 Pages) Texas Instruments – Low-Power Single Positive-Edge-Triggered D-Type Flip-Flop

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Typical Application (continued)
9.2.3 Application Curve
SN74AUP1G80
SCES593F – JULY 2004 – REVISED JULY 2017
Figure 8. Frequency Division
10 Power Supply Recommendations
The power supply can be any voltage between the minimum and maximum supply voltage rating listed in
Recommended Operating Conditions. A 0.1-µF bypass capacitor is recommended to be connected from the VCC
terminal to GND to prevent power disturbance. To reject different frequencies of noise, use multiple bypass
capacitors in parallel. Capacitors with values of 0.1 µF and 1 µF are commonly used in parallel. The bypass
capacitor must be installed as close to the power terminal as possible for best results.
11 Layout
11.1 Layout Guidelines
When a printed-circuit board (PCB) trace turns a corner at a 90° angle, a reflection can occur. A reflection occurs
primarily because of the change of width of the trace. At the apex of the turn, the trace width increases to 1.414
times the width. This increase upsets the transmission-line characteristics, especially the distributed capacitance
and self–inductance of the trace which results in the reflection. Not all PCB traces can be straight and therefore
some traces must turn corners. Figure 9 shows progressively better techniques of rounding corners. Only the last
example (BEST) maintains constant trace width and minimizes reflections.
11.2 Layout Example
WORST
BETTER
BEST
2W
1W min.
W
Figure 9. Trace Example
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