SN74AUP1G80_17 Datasheet, PDF (11/38 Pages) Texas Instruments – Low-Power Single Positive-Edge-Triggered D-Type Flip-Flop

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6.12 Operating Characteristics
T_A = 25°C
PARAMETER
C_pd
Power dissipation capacitance
6.13 Typical Characteristics
100%
80%
60%
40%
20%
0%
Static-Power Consumption
(mA)
3.3 V
/RJLF ‚
100%
Dynamic-Power Consumption
(pF)
80%
60%
3.3 V
/RJLF ‚
40%
20%
AUP
0%
AUP
† _{Single, dual, and triple gates}
Figure 1. AUP – The Lowest-Power Family
SN74AUP1G80
SCES593F – JULY 2004 – REVISED JULY 2017
TEST CONDITIONS
f = 10 MHz
V_CC
0.8 V
1.2 V ± 0.1 V
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
TYP UNIT
4
4
4
pF
4
4.1
4.3
3.5
3
2.5
2
1.5
1
0.5
0
-0.5
0
Switching Characteristics
at 25 MHz †
5 10 15 20 25 30 35 40 45
Time-ns
†_{AUP1G08 data at CL = 15 pF}
Figure 2. Excellent Signal Integrity
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