SN74AUP1G80_17 Datasheet, PDF (15/38 Pages) Texas Instruments – Low-Power Single Positive-Edge-Triggered D-Type Flip-Flop

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Feature Description (continued)
Device
VCC
SN74AUP1G80
SCES593F – JULY 2004 – REVISED JULY 2017
Input
-IIK
Logic
Output
-IOK
GND
Figure 6. Electrical Placement of Clamping Diodes for Each Input and Output
8.3.4 Partial Power Down (I_off)
The inputs and outputs for this device enter a high-impedance state when the supply voltage is 0 V. The
maximum leakage into or out of any input or output pin on the device is specified by I_off in the Electrical
Characteristics: T_A = 25°C.
8.3.5 Over-Voltage Tolerant Inputs
Input signals to this device can be driven above the supply voltage so long as they remain below the maximum
input voltage value specified in the Absolute Maximum Ratings.
8.4 Device Functional Modes
Table 1 lists the functional modes of the SN74AUP1G80 device.
Table 1. Function Table
INPUTS
CLK
D
↑
H
↑
L
L or H
X
OUTPUT
Q
L
H
Q₀
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