TL16C554A_13 Datasheet, PDF (15/46 Pages) Texas Instruments – ASYNCHRONOUS-COMMUNICATIONS ELEMENT

TL16C450 Mode:
SIN
(receiver input data)
Sample Clock
INTx
(data ready or
RCVR ERR)
IOR
TL16C554A, TL16C554AI
ASYNCHRONOUS-COMMUNICATIONS ELEMENT
SLLS509E − AUGUST 2001 − REVISED JUNE 2010
PARAMETER MEASUREMENT INFORMATION
Start
Data Bits (5 −8)
Parity
Stop
t_d9
50%
50%
50%
t_pd4
Active
Figure 9. Receiver Timing Waveforms
RXx
Start _{Data Bits (5 −8)}
Parity Stop
Sample
Clock
INTx (trigger
interrupt)
(FCR6, 7 = 0, 0)
IOR
(RD RBR)
LSR
Interrupt
IOR
(RD LSR)
50%
t_d9
50%
t_pd4
50%
Active
(FIFO at or
above trigger
level)
(FIFO below
trigger level)
50%
t_pd4
50% Active
50%
Figure 10. Receiver FIFO First Byte (Sets RDR) Waveforms
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