LM3S5D91-IQC80-A1 Datasheet, PDF (1262/1342 Pages) Texas Instruments – Stellaris LM3S5D91 Microcontroller

Electrical Characteristics
NRND: Not recommended for new designs.
25.11
25.12
Input/Output Characteristics
Note: All GPIO signals are 5-V tolerant when configured as inputs except for PB0 and PB1, which
are limited to 3.6 V. See “Signal Description” on page 400 for more information on GPIO
configuration.
Table 25-17. GPIO Module Characteristics^a
Parameter Parameter Name
Min
Nom
Max
Unit
R_GPIOPU GPIO internal pull-up resistor
100
-
300
kΩ
R_GPIOPD
I_LKG
GPIO internal pull-down resistor
GPIO input leakage current^b
GPIO rise time, 2-mA drive^c
200
-
500
kΩ
-
-
2
µA
14
20
ns
T_GPIOR
GPIO rise time, 4-mA drive^c
GPIO rise time, 8-mA drive^c
7
10
ns
-
4
5
ns
GPIO rise time, 8-mA drive with slew rate control^c
6
8
ns
GPIO fall time, 2-mA drive^d
14
21
ns
T_GPIOF
GPIO fall time, 4-mA drive^d
GPIO fall time, 8-mA drive^d
7
11
ns
-
4
6
ns
GPIO fall time, 8-mA drive with slew rate control^d
6
8
ns
a. V_DD must be within the range specified in Table 25-2 on page 1253.
b. The leakage current is measured with GND or V_DD applied to the corresponding pin(s). The leakage of digital port pins is
measured individually. The port pin is configured as an input and the pullup/pulldown resistor is disabled.
c. Time measured from 20% to 80% of V_DD.
d. Time measured from 80% to 20% of V_DD.
External Peripheral Interface (EPI)
When the EPI module is in SDRAM mode, the drive strength must be configured to 8 mA. Table
25-18 on page 1262 shows the rise and fall times in SDRAM mode with 16 pF load conditions. When
the EPI module is in Host-Bus or General-Purpose mode, the values in “Input/Output
Characteristics” on page 1262 should be used.
Table 25-18. EPI SDRAM Characteristics
Parameter Parameter Name
Condition
Min
T_SDRAMR EPI Rise Time (from 20% to 80% of 8-mA drive, C_L = 16 pF
-
V_DD)
T_SDRAMF
EPI Fall Time (from 80% to 20% of 8-mA drive, C_L = 16 pF
-
V_DD)
Nom
2
2
Max
3
3
Table 25-19. EPI SDRAM Interface Characteristics^a
Parameter No
E1
E2
E3
E4
E5
E6
Parameter
T_CK
T_CH
T_CL
T_COV
T_COI
T_COT
Parameter Name
SDRAM Clock period
SDRAM Clock high time
SDRAM Clock low time
CLK to output valid
CLK to output invalid
CLK to output tristate
Min
Nom Max
20
-
-
10
-
-
10
-
-
-5
-
5
-5
-
5
-5
-
5
Unit
ns
ns
Unit
ns
ns
ns
ns
ns
ns
1262
Texas Instruments-Production Data
October 05, 2012