LM3S5D91-IQC80-A1 Datasheet, PDF (1172/1342 Pages) Texas Instruments – Stellaris LM3S5D91 Microcontroller

Signal Tables
NRND: Not recommended for new designs.
23
Signal Tables
The following tables list the signals available for each pin. Signals are configured as GPIOs on reset,
except for those noted below. Use the GPIOAMSEL register (see page 440) to select analog mode.
For a GPIO pin to be used for an alternate digital function, the corresponding bit in the GPIOAFSEL
register (see page 424) must be set. Further pin muxing options are provided through the PMCx bit
field in the GPIOPCTL register (see page 442), which selects one of several available peripheral
functions for that GPIO.
Important: All GPIO pins are configured as GPIOs by default with the exception of the pins shown
in the table below. A Power-On-Reset (POR) or asserting RST puts the pins back to their
default state.
Table 23-1. GPIO Pins With Default Alternate Functions
GPIO Pin
PA[1:0]
PA[5:2]
PB[3:2]
PC[3:0]
Default State
UART0
SSI0
I²C0
JTAG/SWD
GPIOAFSEL Bit GPIOPCTL PMCx Bit Field
0
0x1
0
0x1
0
0x1
1
0x3
Table 23-2 on page 1173 shows the pin-to-signal-name mapping, including functional characteristics
of the signals. Each possible alternate analog and digital function is listed for each pin.
Table 23-3 on page 1185 lists the signals in alphabetical order by signal name. If it is possible for a
signal to be on multiple pins, each possible pin assignment is listed. The "Pin Mux" column indicates
the GPIO and the encoding needed in the PMCx bit field in the GPIOPCTL register.
Table 23-4 on page 1196 groups the signals by functionality, except for GPIOs. If it is possible for a
signal to be on multiple pins, each possible pin assignment is listed.
Table 23-5 on page 1205 lists the GPIO pins and their analog and digital alternate functions. The AINx
and VREFA analog signals are not 5-V tolerant and go through an isolation circuit before reaching
their circuitry. These signals are configured by clearing the corresponding DEN bit in the GPIO Digital
Enable (GPIODEN) register and setting the corresponding AMSEL bit in the GPIO Analog Mode
Select (GPIOAMSEL) register. Other analog signals are 5-V tolerant and are connected directly to
their circuitry (C0-, C0+, C1-, C1+, C2-, C2+, USB0VBUS, USB0ID). These signals are configured
by clearing the DEN bit in the GPIO Digital Enable (GPIODEN) register. The digital signals are
enabled by setting the appropriate bit in the GPIO Alternate Function Select (GPIOAFSEL) and
GPIODEN registers and configuring the PMCx bit field in the GPIO Port Control (GPIOPCTL)
register to the numeric enoding shown in the table below. Table entries that are shaded gray are
the default values for the corresponding GPIO pin.
Table 23-6 on page 1208 lists the signals based on number of possible pin assignments. This table
can be used to plan how to configure the pins for a particular functionality. Application Note AN01274
Configuring Stellaris^® Microcontrollers with Pin Multiplexing provides an overview of the pin muxing
implementation, an explanation of how a system designer defines a pin configuration, and examples
of the pin configuration process.
Note: All digital inputs are Schmitt triggered.
1172
Texas Instruments-Production Data
October 05, 2012