AM3517_14 Datasheet, PDF (124/223 Pages) Texas Instruments – ARM Microprocessors

AM3517, AM3505
SPRS550E – OCTOBER 2009 – REVISED MARCH 2013
gpmc_fclk
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gpmc_clk
gpmc_ncsx
gpmc_a[26:17]
gpmc_nbe0_cle
gpmc_nbe1
gpmc_nadv_ale
gpmc_nwe
gpmc_a[16:1]_d[15:0]
FA9
FA10
FA10
FA3
FA12
FA25
FA29
Valid Address (LSB)
FA1
Address (MSB)
FA0
FA0
FA27
FA28
Data OUT
gpmc_waitx
gpmc_io_dir
OUT
In gpmc_ncsx, x is equal to 0, 1, 2, 3, 4, 5, 6, or 7. In gpmc_waitx, x is equal to 0, 1, 2, or 3.
Figure 6-12. GPMC/Multiplexed NOR Flash – Asynchronous Write – Single Word Timing
030-031
6.4.1.3 GPMC/NAND Flash Interface Timing
The following tables assume testing over the recommended operating conditions and electrical
characteristic conditions.
Table 6-9. GPMC/NAND Flash Asynchronous Mode Timing Conditions
TIMING CONDITION PARAMETER
Input Conditions
t_R
t_F
C_LOAD
Input signal rise time
Input signal fall time
Output load capacitance
1.8V, 3.3V
MIN
MAX
1.8
1.8
30
UNIT
ns
ns
pF
124 Timing Requirements and Switching Characteristics
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