LM3S308 Datasheet, PDF (104/537 Pages) Texas Instruments – ARM and Thumb are registered trademarks and Cortex is a trademark

Cortex-M3 Peripherals
Register 18: CPU ID Base (CPUID), offset 0xD00
Note: This register can only be accessed from privileged mode.
The CPUID register contains the ARM® Cortex™-M3 processor part number, version, and
implementation information.
CPU ID Base (CPUID)
Base 0xE000.E000
Offset 0xD00
Type RO, reset 0x410F.C231
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
IMP
VAR
CON
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
1
0
0
0
0
0
1
0
0
0
0
1
1
1
1
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
PARTNO
REV
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
1
1
0
0
0
0
1
0
0
0
1
1
0
0
0
1
Bit/Field
31:24
Name
IMP
Type
RO
Reset
0x41
Description
Implementer Code
Value Description
0x41 ARM
23:20
VAR
RO
0x0
Variant Number
Value Description
0x0 The rn value in the rnpn product revision identifier, for example,
the 0 in r0p1.
19:16
CON
RO
0xF
Constant
Value Description
0xF Always reads as 0xF.
15:4
PARTNO
RO
0xC23 Part Number
Value Description
0xC23 Cortex-M3 processor.
3:0
REV
RO
0x1
Revision Number
Value Description
0x1 The pn value in the rnpn product revision identifier, for example,
the 1 in r0p1.
104
June 18, 2012
Texas Instruments-Production Data