TMS320DM6467CCUT7 Datasheet, PDF (99/355 Pages) Texas Instruments – Digital Media System-on-Chip

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BIT
31:18
17
16
15:13
12
11:9
8
7:4
3:0
TMS320DM6467
SPRS403H – DECEMBER 2007 – REVISED JUNE 2012
NAME
RESERVED
DSP_BT
PCIEN
RESERVED
VADJEN
RESERVED
CS2_BW
RESERVED
BOOTMODE
Table 4-10. BOOTCFG Register Bit Descriptions
DESCRIPTION
Reserved. Read returns "0".
DSP Boot. Latched from DSPBOOT input at the rising edge of RESET or POR.
0 = ARM boots C64x+.
1 = C64x+ self-boots.
This bit will cause the DSP to be released from reset automatically. The C64x+ will boot from
EMIFA (default DSPBOOTADDR address 0x4220 0000). If BOOTMODE = 0010 or 0011,
or PCIEN = 1, then the C64x+ self-boot will fail since EMIFA will be disabled.
PCI Enable. Latched from PCIEN input at the rising edge of RESET or POR.
0 = PCI disabled.
1 = PCI enabled.
PCIEN = 1 disables the internal pullup and pulldown resistors on the PCI pins and configures the
pin muxing for PCI.
Reserved. Read returns "0".
Votlage Adjust Enable (SmartReflex). Latched from VADJEN input at the rising edge of RESET or
POR.
This pin determines whether GP[6]/CVDDADJ0 and GP[7]/CVDDADJ1 function as GPIO pins or as
SmartReflex control output pins.
0 = SmartReflex outputs disabled. GP[6]/CVDDADJ0 and GP[7]/CVDDADJ1 pins function as GPIO.
1 = SmartReflex outputs enabled. GP[6]/CVDDADJ0 and GP[7]/CVDDADJ1 pins function as
SmartReflex control outputs.
Reserved. Read returns "0".
EMIFA EM_CS2 Default Bus Width. Latched from CS2BW input at the rising edge of RESET or
POR.
0 = Default to 8-bit operation.
1 = Default to 16-bit operation.
This bit determines the default bus width of the EMIFA EM_CS2 memory space. This ensures that
boot from EMIFA (ARM or DSP) will correctly read the attached memory.
Reserved. Read returns "0".
Boot Mode Configuration Bits. Bit values latched from BTMODE[3:0] at the rising edge of RESET or
POR.
0000 = Emulation boot.
0001 = Reserved.
0010 = HPI-16 (if PCIEN = 0).
PCI without autoinitialization (if PCIEN = 1).
0011 = HPI-32 (if PCIEN = 0).
PCI with autoinitialization (if PCIEN = 1).
0100 = EMIFA direct boot (ROM/NOR) (if PCIEN = 0; error if PCIEN = 1 defaults to UART0).
0101 = Reserved.
0110 = I2C boot.
0111 = NAND Flash boot (if PCIEN = 0; error if PCIEN = 1 defaults to UART0).
1000 = UART0 boot.
1001 = Reserved.
1010 = Reserved.
1011 = Reserved.
1100 = Reserved.
1101 = Reserved.
1110 = SPI boot.
1111 = Reserved.
Copyright © 2007–2012, Texas Instruments Incorporated
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Device Configurations
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