TLK2711-SP Datasheet, PDF (9/21 Pages) Texas Instruments – 1.6-Gbps to 2.5-Gbps Class V Transceiver

TLK2711-SP
www.ti.com .............................................................................................................................................................. SGLS307D – JULY 2006 – REVISED JULY 2009
Comma Detect and 8-Bit/10-Bit Decoding
The TLK2711 has two parallel 8-bit/10-bit decode circuits. Each 8-bit/10-bit decoder converts 10-bit encoded
data (half of the 20-bit received word) back into eight bits. The comma-detect circuit is designed to provide for
byte synchronization to an 8-bit/10-bit transmission code. When parallel data is clocked into a parallel-to-serial
converter, the byte boundary that was associated with the parallel data is now lost in the serialization of the data.
When the serial data is received and converted to parallel format again, a method is needed to recognize the
byte boundary. Typically, this is accomplished through the use of a synchronization pattern. This is typically a
unique pattern of ones and zeros that either cannot occur as part of valid data or is a pattern that repeats at
defined intervals. The 8-bit/10-bit encoding contains a character called the comma (b0011111 or b1100000),
which is used by the comma-detect circuit on the TLK2711 to align the received serial data back to its original
byte boundary. The decoder detects the comma, generating a synchronization signal aligning the data to their
10-bit boundaries for decoding; the comma is mapped into the LSB. The decoder then converts the data back
into 8-bit data. The output from the two decoders is latched into the 16-bit register synchronized to the recovered
parallel data clock (RXCLK) and output valid on the rising edge of the RXCLK.
NOTE:
The TLK2711 only achieves byte alignment on the 0011111 comma.
Decoding provides two additional status signals, RKLSB and RKMSB. When RKLSB is asserted, an 8-bit/10-bit
K code is received and the specific K code is presented on the data bits RXD0–RXD7; otherwise, an 8-bit/10-bit
D code is received. When RKMSB is asserted, an 8-bit/10-bit K code is received and the specific K-code is
presented on data bits RXD8–RXD15; otherwise, an 8-bit/10-bit D code is received (see Table 3). The valid K
codes the TLK2711; decodes are provided in Table 4. An error detected on either byte, including K codes not in
Table 4, causes that byte only to indicate a K0.0 code on the RKxSB and associated data pins, where K0.0 is
known to be an invalid 8-bit/10-bit code. A loss of input signal causes a K31.7 code to be presented on both
bytes, where K31.7 is also known to be an invalid 8-bit/10-bit code.
RKLSB
0
0
1
1
RKMSB
0
1
0
1
Table 3. Receive Status Signals
DECODED 20-BIT OUTPUT
Valid data on RXD0–RXD7,
Valid data RXD8–RXD15
Valid data on RXD0–RXD7,
K code on RXD8–RXD15
K code on RXD0–RXD7,
Valid data on RXD8–RXD15
K code on RXD0–RXD7,
K code on RXD8–RXD15
Table 4. Valid K Characters
K CHARACTER
K28.0
K28.1 ⁽¹⁾
K28.2
K28.3
K28.4
K28.5 ⁽¹⁾
K28.6
K28.7 ⁽¹⁾
K23.7
K27.7
K29.7
K30.7
RECEIVE DATA BUS
RXD0–RXD7 OR RXD8–RXD15
000 11100
001 11100
010 11100
011 11100
100 11100
101 11100
110 11100
111 11100
111 10111
111 11011
111 11101
111 11110
(1) Should only be present on RXD0–RXD7 when in running disparity
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