BQ24262_15 Datasheet, PDF (9/56 Pages) Texas Instruments – bq2426x 3-A, 30-V, Host-Controlled Single-Input, Single-Cell Switched-Mode Li-Ion Battery Charger With Power-Path Management and USB-OTG Support

Not Recommended for New Designs : bq24260, bq24261
www.ti.com
bq24260, bq24261, bq24261M, bq24262
SLUSBU4D – DECEMBER 2013 – REVISED APRIL 2015
Electrical Characteristics (continued)
Circuit of Figure 7, V_UVLO < V_IN < V_OVP AND V_IN > V_BAT+ V_SLP, T_J = –40°C to 125°C and T_J = 25°C for typical values (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
INPUT CURRENT LIMITING
I_INLIM
Input current limiting threshold
USB charge mode, V_IN = 5 V, Current
pulled from SW
I_INLIM=USB100
I_INLIM=USB500
I_INLIM=USB150
I_INLIM=USB900
I_INLIM=1.5 A
I_INLIM=2 A, YFF
Package
90
450
125
800
1425
1850
95
475
140
850
1500
2000
100
500
150
900
1575
2150 mA
I_INLIM=2 A, RGE
Package
1850
2000
2200
I_INLIM=2.5 A, YFF
Package
2300
2500
2700
I_INLIM=2.5 A,
RGE Package
2225
2500
2825
V_{IN_DPM}
Input based DPM threshold
range
Charge mode, programmable via I²C
4.2
11.6
V
V_{IN_DPM} threshold Accuracy
V_DRV BIAS REGULATOR
V_DRV
Internal bias regulator voltage
I_DRV
DRV Output Current
V_{DO_DRV}
DRV Dropout Voltage
(V_{IN – VDRV})
STATUS OUTPUT (STAT, INT)
V_IN > 5 V
I_IN = 1 A, V_IN = 4.2 V, I_DRV = 10 mA
–3%
4.3
0
3%
4.8
5.3
V
10 mA
450 mV
V_OL
Low-level output saturation
voltage
I_O = 10 mA, sink current
0.4
V
I_IH
High-level leakage current
INPUT PINS (CD, PSEL)
V _STAT = V_INT = 5 V
1 µA
V_IL
V_IH
R_PULLDOWN
Input low threshold
Input high threshold
CD pulldown resistance
Deglitch for CD and PSEL
CD Only
CD or PSEL rising/falling
0.4
V
1.4
V
100
kΩ
100
µs
PROTECTION
V_UVLO
V_{UVLO_HYS}
V_BATUVLO
IC active threshold voltage
IC active hysteresis
Battery Undervoltage Lockout
threshold
V_IN rising
V_IN falling from above V_UVLO
V_BAT falling, 100-mV Hysteresis
3.2
3.3
3.4
V
300
mV
2.4
2.6
V
V_SLP
t_DGL(BAT)
Sleep-mode entry threshold,
V_IN-V_BAT
Deglitch time, BAT above
V_BATUVLO before SYS starts to
rise
2.0 V < V_BAT < V_BATREG, V_IN falling
0
40
120 mV
1.2
ms
V_{SLP_HYS}
t_DGL(VSLP)
V_OVP
Sleep-mode exit hysteresis
Deglitch time for supply rising
above V_SLP+V_{SLP_HYS}
Input supply OVP threshold
voltage
V_IN rising above V_SLP
Rising voltage, 2-mV over drive, t_RISE=100 ns
IN rising, 100-mV hysteresis
bq24260
bq24261/1M
bq24262
40
100
190 mV
30
ms
10.1
10.5
10.9
13.6
14
14.4
V
6.25
6.5
6.75
V_BATGD
Good Battery Monitor
Threshold (BQ24260/1 only)
V_IN Rising
3.51
3.7
3.89
V
t_{DGL(BUCK_OVP)}
Deglitch time, VIN OVP in
Buck Mode
IN falling below V_OVP
30
ms
V_BOVP
Battery OVP threshold voltage V_BAT threshold over V_OREG to turn off charger during charge
1.03 ×
V_BATREG
1.05 ×
V_BATREG
1.07 ×
V_BATREG
V
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