BQ24262_15 Datasheet, PDF (31/56 Pages) Texas Instruments – bq2426x 3-A, 30-V, Host-Controlled Single-Input, Single-Cell Switched-Mode Li-Ion Battery Charger With Power-Path Management and USB-OTG Support

Not Recommended for New Designs : bq24260, bq24261
www.ti.com
bq24260, bq24261, bq24261M, bq24262
SLUSBU4D – DECEMBER 2013 – REVISED APRIL 2015
9.6.2 Control Register (READ/WRITE)
Memory location: 01, Reset state: 1xxx 1100 (bq24260/2), 1xxx 1110 (bq24261/1M)
Figure 20. bq24260/2 Control Register
B7(MSB)
B6
B5
B4
B3
B2
B1
B0(LSB)
1
X
X
X
1
1
0
.0
W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Figure 21. bq24261/1M Control Register
B7(MSB)
B6
B5
B4
B3
B2
1
X
X
X
1
1
W
R/W
R/W
R/W
R/W
R/W
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 3. Control Register Field Descriptions
B1
B0(LSB)
1
0
R/W
R/W
BIT
B7(MSB)
FIELD
RESET
B6
IN_LIMIT_2
B5
IN_LIMIT_1
B4
IN_LIMIT _0
B3
B2
B1
B0(LSB)
EN_STAT
TE
CE
HZ_MODE
TYPE
W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
DESCRIPTION
Write: 1-Reset all registers to default values
0-No effect
Read: always get 1
000-USB2.0 host with 100-mA current limit
001-USB3.0 host with 150-mA current limit
010 – USB2.0 host with 500-mA current limit
011 – USB3.0 host/charger with 900-mA current limit
100 – Charger with 1500-mA current limit
101—Charger with 1950-mA current limit
110 – Charger with 2500-mA current limit
111- Charger with 2000-mA current limit (default 000⁽¹⁾)
0-Disable STAT function (STAT only shows faults)
1-Enable STAT function (default 1)
0-Disable charge current termination
1-Enable charge current termination (default 1)
0-Charger enabled
1-Charger is disabled (default 0-bq24260 / 2, 1-bq24261/1M)
0-Not high impedance mode
1-High impedance mode (default 0)
(1) When in DEFAULT mode, PSEL (bq24261/1M/2) determines the default input current limit.
RESET Bit
The RESET bit in the control register (0x01h) is used to reset all the charge parameters. Write 1 to
RESET bit to reset all the registers to default values and place the bq24260/1/1M/2 into DEFAULT mode
and turn off the watchdog timer. The RESET bit is automatically cleared to zero once the bq24260/1/1M/2
enters DEFAULT mode.
CE Bit (Charge Enable)
The CE bit is used to disable or enable the charge process. A low logic level (0) on this bit enables the
charge and a high logic level (1) disables the charge. When charge is disabled, the SYS output regulates
to V_SYS(REG) and battery is disconnected from the SYS. Supplement mode is available if the system load
demands cannot be met by the supply.
HZ_MODE Bit (High Impedance Mode Enable)
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