BQ24262_15 Datasheet, PDF (17/56 Pages) Texas Instruments – bq2426x 3-A, 30-V, Host-Controlled Single-Input, Single-Cell Switched-Mode Li-Ion Battery Charger With Power-Path Management and USB-OTG Support

Not Recommended for New Designs : bq24260, bq24261
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bq24260, bq24261, bq24261M, bq24262
SLUSBU4D – DECEMBER 2013 – REVISED APRIL 2015
Device Functional Modes (continued)
9.4.3.1.2 Input Voltage Based Dynamic Power Management (V_IN-DPM)
During normal charging process, if the input power source is not able to support the programmed or default
charging current, the supply voltage deceases. Once the supply drops to V_{IN_DPM} (default 4.2 V), the charge
current limit is reduced to prevent the further drop of the supply. When the IC enters this mode, the charge
current is lower than the set value and the DPM_STATUS bit is set. This feature ensures IC compatibility with
adapters with different current capabilities without a hardware change. Figure 9 shows the V_IN-DPM behavior to a
current limited source. In this figure the input source has a 2-A current limit and the device is charging at 1 A. A
2.5-A load transient then occurs on V_SYS causing the adapter to hit its current limit and collapse, while V_SYS goes
from V_SYSREG(LO) to V_MINSYS. If the 2X timer is set, the safety timer is extended while V_IN-DPM is active.
Additionally, termination is disabled.
V_IN
(5V Offset)
Input voltage regulated to VIN_DPM
1V/div
I_IN
V_SYS
(3.6V Offset)
I_BAT
Normal Charging (1A)
I_SYS
Input current limit reduced to avoid crashing adapter
SYS enters supplement mode to ensure SYS load is supported
800us/div
Figure 9. bq24260/1/1M/2 V_IN-DPM
2A/div
500mV/div
2A/div SYS load removed,
normal charging
resumes
2A/div
9.4.3.1.3 Input Overvoltage Protection
The built-in input overvoltage protection protects the bq24260/1/1M/2 and downstream components connected to
SYS and/or BAT against damage from overvoltage on the input supply (Voltage from V_IN to PGND). When V_IN >
V_OVP, the bq24260/1/1M/2 turns off the PWM converter immediately. After the deglitch time t_{DGL(BUCK_OVP)}, an
OVP fault is determined to exist. During the OVP fault, the bq24260/1/1M/2 turns the battery FET and BGATE
on, sends a single 128-μs pulse on the STAT and INT outputs, and the STATx and FAULT_x bits are updated in
the I²C. Once the OVP fault is removed, the STATx bits are cleared and the device returns to normal operation.
The FAULT_x bits are not cleared until they are read in the I²C after the OVP condition no longer exists.
The OVP threshold for the bq24260 is 10.5 V for operation from standard adapters while the bq24261/1M is set
to 14 V to enable operation from 12-V sources. The bq24262 OVP is set to 6.5 V to operate from standard USB
sources.
9.4.3.2 Charge Profile
When a valid input source is connected (V_IN > V_UVLO and V_BAT + V_SLP < V_IN < V_OVP), the CE bit in the control
register determines whether a charge cycle is initiated. By default, the bq24260 and bq24262 enable the charge
cycle when a valid input source is connected while the bq24261/1M do not (CE = 1 by default). When the CE bit
is 1 and a valid input source is connected, the battery FET is turned off and the SYS output is regulated to
VSYSREG(HI). A charge cycle is initiated when the CE bit is written to a 0.
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