AMC7812B_15 Datasheet, PDF (77/92 Pages) Texas Instruments – 12-Bit Analog Monitoring and Control Solution with Multichannel ADC, DACs, and Temperature Sensors

AMC7812B
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SBAS625A – SEPTEMBER 2013 – REVISED SEPTEMBER 2013
Analog Input Channel Threshold Registers (Read or Write, Addresses = 5Ah to 61h)
Four analog auxiliary inputs (CH0, CH1, CH2, and CH3) and three temperature sensors (LT, D1, and D2)
implement an out-of-range alarm function. Threshold-High-n and Threshold-Low-n (where n = 0, 1, 2, 3) define
the upper bound and lower bound of the nth analog input range, as shown in Table 27. This window determines
whether the nth input is out-of-range. When the input is outside the window, the corresponding CH-ALR-n bit in
the status register is set to '1'.
For normal operation, the value of Threshold-High-n must be greater than the value of Threshold-Low-n;
otherwise, CH-ALR-n is always set to '1' and an alarm is always indicated. Note that when the analog channel is
accessed as single-ended input, its threshold is in a straight binary format. However, when the channel is
accessed as a differential pair, its threshold is in twos complement format.
INPUT CHANNEL
Channel 0
Channel 1
Channel 2
Channel 3
CH0+, CH1–
CH2+, CH3–
Table 27. Threshold Coding
INPUT TYPE
Single-ended
Single-ended
Single-ended
Single-ended
Differential
Differential
THRESHOLD STORED IN
Input-0-Threshold-High-Byte
Input-0-Threshold-Low-Byte
Input-1-Threshold-High-Byte
Input-1-Threshold-Low-Byte
Input-2-Threshold-High-Byte
Input-2-Threshold-Low-Byte
Input-3-Threshold-High-Byte
Input-3-Threshold-Low-Byte
Input-0-Threshold-High-Byte
Input-0-Threshold-Low-Byte
Input-2-Threshold-High-Byte
Input-2-Threshold-Low-Byte
FORMAT
Straight binary
Straight binary
Straight binary
Straight binary
Twos complement
Twos complement
Input-n-High-Threshold Register (where n = 0, 1, 2, 3) (Read or Write, Default = 0FFFh)
MSB
BIT 15
0
BIT 14
0
BIT 13
0
BIT 12
0
BIT 11
THRH
11
BIT 10
THRH
10
BIT 9
THRH
9
BIT 8
THRH
8
BIT 7
THRH
7
BIT 6
THRH
6
BIT 5
THRH
5
BIT 4
THRH
4
BIT 3
THRH
3
BIT 2
THRH
2
BIT 1
THRH
1
LSB
BIT 0
THRH
0
Bits[15:12]
Bits[11:0]
Reserved
These bits are '0' when read back. Writing to these bits has no effect.
THRHn
Data bits of the upper-bound threshold of the nth analog input.
Input-n-Low-Threshold Register (where n = 0, 1, 2, 3) (Read or Write, Default = 0000h)
MSB
BIT 15
0
BIT 14
0
BIT 13 BIT 12 BIT 11
0
0
THRL
11
BIT 10
THRL
10
BIT 9
THRL
9
BIT 8
THRL
8
BIT 7
THRL
7
BIT 6
THRL
6
BIT 5
THRL
5
BIT 4
THRL
4
BIT 3
THRL
3
BIT 2
THRL
2
BIT 1
THRL
1
LSB
BIT 0
THRL
0
Bits[15:12]
Bits[11:0]
Reserved
These bits are '0' when read back. Writing to these bits has no effect.
THRLn
Data bits of the lower-bound threshold of the nth analog input.
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