AMC7812B_15 Datasheet, PDF (34/92 Pages) Texas Instruments – 12-Bit Analog Monitoring and Control Solution with Multichannel ADC, DACs, and Temperature Sensors

AMC7812B
SBAS625A – SEPTEMBER 2013 – REVISED SEPTEMBER 2013
www.ti.com
a) Internal Trigger, Direct Mode:
a) External Trigger, Direct Mode:
SS
SDI
DAV
Set ICONV ^First
bit to ‘1’
Internal
Trigger
Read Data
DATA
First Conversion of
the Channels Specified in
the ADC Channel Register
Set ICONV
bit to ‘1’
Second
Internal
Trigger
Read Data
DATA
Second Conversion of
the Channels Specified in
the ADC Channel Register
b) Internal Trigger, Auto Mode:
SS
Set ICONV Internal
bit to ‘1’
Trigger
SDI
1ms
DAV
First Conversion of
Second Conversion
the Channels Specified in
the ADC Channel Register
Third Conversion
CNVT
DAV
First
Trigger
First Conversion of
the Channels Specified in
the ADC Channel Register
Second
Trigger
Third
Trigger
Second Conversion of
the Channels Specified in
the ADC Channel Register
Third Conversion of
the Channels Specified in
the ADC Channel Register
b) External Trigger, Auto Mode:
CNVT
First
Trigger
1ms
DAV
First Conversion of
the Channels Specified in
the ADC Channel Register
Second Conversion of
the Channels Specified in
the ADC Channel Register
Third Conversion of
the Channels Specified in
the ADC Channel Register
Figure 85. ADC External Trigger
Figure 84. ADC Internal Trigger
Data Available Pin (DAV)
DAV is an output pin that indicates the completion of ADC conversions. The DAVF bit in AMC configuration
register 0 determines the status of the DAV pin. In direct mode, after the selected group of input channels are
converted and the ADC is stopped, the DAVF bit is set to '1' and the DAV pin is driven to logic low (active). In
ADC auto mode, each time the group of input channels are sequentially converted, a 1-µs pulse (low) appears
on the DAV pin.
Convert Pin (CNVT)
CNVT is the input pin for the external ADC trigger signal. ADC channel conversions begin on the falling edge of
the CNVT pulse. If a CNVT pulse occurs when the ADC is already converting, then the ADC continues
converting the current channel. After the current channel completes, the existing conversion cycle finishes and a
new conversion cycle starts. The selected channels specified in the ADC channel registers are converted
sequentially in order of enabled channels.
Analog Input Out-of-Range Detection (see the Analog Input Out-of-Range Alarm Section)
The CH0 to CH3 analog inputs and the temperature inputs are implemented with out-of-range detection. When
any of these inputs is out of the preset range, the corresponding alarm flag in the status register is set. If any
inputs are out of range, the global out-of-range pin (ALARM) goes low. To avoid a false alarm, the device is
implemented with false-alarm protection. See the Alarm Operation section for more details.
Full-Scale Range of the Analog Input
The gain bit of the ADC gain register determines the full-scale range of the analog input. Full-scale range is V_REF
when ADGn = 0, or (2 × V_REF) when ADGn = 1. If a channel pair is configured for differential operation, the input
ranges are either ±V_REF or ±(2 × V_REF). In (2 × V_REF) mode, the input is effectively divided by two before the
conversion takes place. Each input must not exceed the supply value of AV_DD + 0.2 V or AGND – 0.2 V. When
the REF-OUT pin is connected to the REF-ADC pin, the internal reference is used as the ADC reference. When
an external reference voltage is applied to the REF-ADC pin, the external reference is used as the ADC
reference.
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